15.2. Syntax

The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.

15.2.1. Size Modifiers

The D10V version of as uses the instruction names in the D10V Architecture Manual. However, the names in the manual are sometimes ambiguous. There are instruction names that can assemble to a short or long form opcode. How does the assembler pick the correct form? as will always pick the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being assembled, it will always use the long form. If you need to force the assembler to use either the short or long form of the instruction, you can append either .s (short) or .l (long) to it. For example, if you are writing an assembly program and you want to do a branch to a symbol that is defined later in your program, you can write bra.s foo. Objdump and GDB will always append .s or .l to instructions which have both short and long forms.

15.2.2. Sub-Instructions

The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.

If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.

15.2.3. Special Characters

; and # are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially. To specify the executing order, use the following symbols:


Sequential with instruction on the left first.


Sequential with instruction on the right first.



The D10V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example

abs a1 -> abs r0

Execute these sequentially. The instruction on the right is in the right container and is executed second.

abs r0 <- abs a1

Execute these reverse-sequentially. The instruction on the right is in the right container, and is executed first.

ld2w r2,@r8+ || mac a0,r0,r7

Execute these in parallel.

ld2w r2,@r8+ ||, mac a0,r0,r7

Two-line format. Execute these in parallel.

ld2w r2,@r8+, mac a0,r0,r7

Two-line format. Execute these sequentially. Assembler will put them in the proper containers.

ld2w r2,@r8+ ->, mac a0,r0,r7

Two-line format. Execute these sequentially. Same as above but second instruction will always go into right container.

Since $ has no special meaning, you may use it in symbol names.

15.2.4. Register Names

You can use the predefined symbols r0 through r15 to refer to the D10V registers. You can also use sp as an alias for r15. The accumulators are a0 and a1. There are special register-pair names that may optionally be used in opcodes that require even-numbered registers. Register names are not case sensitive.

Register Pairs

r0-r1, r2-r3, r4-r5, r6-r7, r8-r9, r10-r11, r12-r13, r14-r15


The D10V also has predefined symbols for these control registers and status bits:


Processor Status Word


Backup Processor Status Word


Program Counter


Backup Program Counter


Repeat Count


Repeat Start address


Repeat End address


Modulo Start address


Modulo End address


Instruction Break Address


Flag 0


Flag 1


Carry flag

15.2.5. Addressing Modes

as understands the following addressing modes for the D10V. Rn in the following refers to any of the numbered registers, but not the control registers.


Register direct


Register indirect


Register indirect with post-increment


Register indirect with post-decrement


Register indirect with pre-decrement

@(disp, Rn)

Register indirect with displacement


PC relative address (for branch or rep).


Immediate data (the # is optional and ignored)

15.2.6. @WORD Modifier

Any symbol followed by @word will be replaced by the symbol's value shifted right by 2. This is used in situations such as loading a register with the address of a function (or any other code fragment). For example, if you want to load a register with the location of the function main then jump to that function, you could do it as follows:

ldi     r2, main@word
jmp     r2