Recommendation X.21
INTERFACE BETWEEN DATA TERMINAL EQUIPMENT (DTE)
AND DATA CIRCUIT–TERMINATING EQUIPMENT (DCE) FOR
SYNCHRONOUS OPERATION ON PUBLIC DATA NETWORKS
(Geneva, 1972; amended at Geneva, 1976 and 1980,
Malaga–Torremolinos, 1984 and Melbourne, 1988)
CONTENTS
Preface
1	Scope
2	DTE/DCE physical interface elements
3	Alignment of call control characters and error checking
4	Elements of the call control phase for circuit switched service
5	Data transfer phase
6	Clearing phase
7	Test loops
Annex A –	Interface signalling state diagrams
Annex B –	Interface signalling sequence diagrams and time–out operation
Annex C –	DTE time–limits and DCE time–outs
Annex D –	Formats of Selection, Call progress and line identification signals
Annex E –	Interworking between DTEs conforming to Recommendations X.21 and X.21 bis
Annex F –	Coding of Call progress signals
Annex G –	Facility request, Indicator and Parameter coding
Annex H –	Information content of DCE–provided information
Annex I –	Cross reference and transition tables

	Preface
	The CCITT,
considering
	(a)	that Recommendations X.1 and X.2 define the services and facilities to be provided by a public data network;
	(b)	that Recommendation X.92 defines the hypothetical reference connections for synchronous public data networks;
	(c)	that Recommendation X.96 defines call progress signals;
	(d)	that the necessary elements for an interface Recommendation should be defined in architectural levels;
	(e)	that it is desirable for characteristics of the interface between the DTE and DCE of a public data network to be standardized,
unanimously declares the view
	that the interface between the DTE and DCE in public data networks for user classes of service employing synchronous transmission should be as defined in this Recommendation.
1	Scope
1.1	This Recommendation defines the physical characteristics and call control procedures for a general purpose interface between DTE and DCE for user classes of service, as defined in Recommendation X.1, employing synchronous transmission.
1.2	The formats and procedures for selection, call progress and DCE–provided information are included in this Recommendation.
1.3	The provision for duplex operation is covered.
1.4	The operation of the interface for half duplex operation when the data circuit interconnects with Recommendation X.21 bis DTEs is described in Annex E. Half duplex operation between X.21 DTEs is for further study when such new facilities are identified.
2	DTE/DCE physical interface elements
2.1	Electrical characteristics
2.1.1	Data signalling rates of 9600 bit/s and below
	The electrical characteristics of the interchange circuits at the DCE side of the interface will comply with Recommendation X.27 without cable termination in the load. The electrical characteristics at the DTE side of the interface may be applied according to either Recommendation X.27 either with or without cable termination in the load, or Recommendation X.26. The B` leads of receivers in an X.26 DTE must be brought out to the interface individually and not connected together. (See § 2.2 below.)
	Note – In certain instances where X.27 circuits are implemented on both sides of the interface, it may be necessary to add either serial impedance matching resistors or parallel cable terminating resistors as specified in X.27 to assure proper operation of the interchange circuits.
2.1.2	Data signalling rates above 9600 bit/s
	The electrical characteristics of the interchange circuits at both the DCE side and the DTE side of the interface will comply with Recommendation X.27 with or without implementation of the cable termination in the load.
2.2	Mechanical characteristics
	Refer to ISO 4903 (15–pole DTE/DCE interface connector and contact number assignments) for mechanical arrangements.
2.3	Functional characteristics of interchange circuits
	Definitions of the interchange circuits concerned (see Table 1/X.21) are given in Recommendation X.24.
	In this Recommendation, signal conditions on interchange circuits T, C, R, and I are designated by t, c, r, and i, respectively.
	Signal conditions on circuit C (Control) and I (Indication) refer to continuous ON (significant level binary 0) and continuous OFF (significant level binary 1) conditions.
TABLE 1/X.21
Interchange circuit	Name	Direction		 Remarks	
		 to DCE	 from DCE		
G	Signal ground or common return			See Note 1	
Ga	 DTE common return	 X			
T	 Transmit	 X			
R	 Receive		X		
C	 Control	 X			
I	 Indication		X		
S	 Signal element timing		X	 See Note 2	
B	 Byte timing		X	 See Note 3	
X	 DTE signal element timing	 X		See Note 4	
Note 1 – This conductor may be used to reduce environmental signal interference at the interface. In the case of shielded interconnecting cable, the additional connection considerations are part of Recommendation X.24 and ISO 4903.
Note 2 – Timing for continuous isochronous data transmission will be provided.
Note 3 – May be provided as an optional additional facility (see § 3.1.1 below).
Note 4 – The use and the termination of this circuit by the DCE is a national matter.
2.4	Physical link control conditions
	The DTE and DCE shall be prepared to send steady binary conditions 0 and 1 on circuit R or T, together with associated conditions on circuit C or I, for a period of at least 24 bit intervals. Detection of steady binary 0 or 1 on circuit R or T for 16 contiguous bit intervals with the associated condition on circuit I or C may be interpreted by the DTE or DCE as a steady state condition.
	If the DTE (or DCE) recognizes that the device on the other side of the interface is signalling recognition of the current state, then the DTE (or DCE) may begin signalling the next valid state. If the DTE (or DCE) is not ready to begin signalling the next valid state, it is obliged to continue signalling the current state until it is so ready.
	Note – As for state 12, § 5.1 has precedence over this § 2.4.
2.5	Quiescent phase
	During the quiescent phase, the DTE and the DCE signal their ability to enter operational phases such as the call control phase or the data transfer phase as defined for the appropriate service. The basic quiescent signals of the DTE and the DCE can appear at the interface in various combinations which result in different interface states as defined below and shown in Figure A–1/X.21.
2.5.1	DTE quiescent signals
2.5.1.1	DTE ready
	The DTE indicates its readiness to enter operational phases, according to the appropriate service, by signalling t = 1, c = OFF.
2.5.1.2	DTE uncontrolled not ready
	The DTE indicates that it is unable to enter operational phases, according to the appropriate service, generally because of abnormal operating conditions, by signalling t = 0, c = OFF.
	For leased circuit service point–to–point when the DTE enters DTE uncontrolled not ready, the remote interface may signal r = 0, i = OFF. Additional actions to be taken by the DCE are for further study.
	For leased circuit–centralized multipoint when a DTE enters DTE uncontrolled not ready, no indication of this signal will be given at the other connected DTE/DCE interfaces.
2.5.1.3	DTE controlled not ready
	DTE controlled not ready indicates that, although the DTE is operational, it is temporarily unable to accept incoming calls for circuit switched service.
	This signal is indicated by t = 01 . . . (alternate bits are binary 0 and binary 1), c = OFF. This signal shall persist for a minimum of 24 bit intervals.
	Note – DTE controlled not ready is normally entered from the ready state, as defined in § 2.5.3.1 below. In some networks, the DCE may not recognize the DTE controlled not ready signal if the DTE does not first signal DTE ready at the same time the DCE signals DCE ready.
2.5.2	DCE quiescent signals
2.5.2.1	DCE ready
	The DCE indicates its readiness to enter operational phases, according to the appropriate service, by signalling r = 1, i = OFF.
2.5.2.2	DCE not ready
	DCE not ready indicates that no service is available and will be signalled whenever possible during network fault conditions and when test loops are activated. This signal is indicated by r = 0, i = OFF.
2.5.2.3	DCE controlled not ready
	DCE controlled not ready indicates that, although the DCE is operational, it is temporarily unable to render service.
	This signal is indicatd by r = 01 . . . (alternate bits are binary 0 and binary 1), i = OFF. This signal shall persist for a minimum of 24 bit intervals.
	Note 1 – DCE controlled not ready may be entered from any state.
	Note 2 – DCE controlled not ready may be provided as an optional facility.

2.5.3	Quiescent states (see Figure A–1/X.21)
2.5.3.1	Ready (state 1)
	Ready is entered when the DTE and the DCE simultaneously signal DTE ready and DCE ready, respectively.
2.5.3.2	State 14
	State 14 is entered when the DTE and the DCE simultaneously signal DTE controlled not ready and DCE ready, respectively.
2.5.3.3	State 18
	State 18 is entered when the DTE and the DCE simultaneously signal DTE ready and DCE not ready, respectively.
2.5.3.4	State 22
	State 22 is entered when the DTE and the DCE simultaneously signal DTE uncontrolled not ready and DCE not ready, respectively.
2.5.3.5	State 23
	State 23 is entered when the DTE and the DCE simultaneously signal DTE controlled not ready and DCE not ready, respectively.
2.5.3.6	State 24
	State 24 is entered when the DTE and the DCE simultaneously signal DTE uncontrolled not ready and DCE ready, respectively.
2.6	Failure detection
2.6.1	Fault conditions of interchange circuits2
	The DTE should interpret a fault condition on circuit R as r = 0, using failure detection type 2, a fault condition on circuit I as i = OFF, using failure detection type 1, and a fault condition on both circuits R and I as r = 0, i = OFF, DCE not ready. Alternatively, a fault condition on one of these circuits, R or I, may be interpreted by the DTE as DCE not ready, r = 0, i = OFF using failure detection type 3.
	The DCE will interpret a fault condition on circuit T as t = 0, using failure detection type 2, a fault condition on circuit C as c = OFF, using failure detection type 1, and a fault condition on both circuits T and C as t = 0, c = OFF, DTE uncontrolled not ready. Alternatively, a fault condition on one of these circuits, T or C, may be interpreted by the DCE as DTE uncontrolled not ready, t = 0, c = OFF using failure detection type 3.
2.6.2	DCE fault conditions
	If the DCE is unable to provide service (e.g., loss of alignment or loss of incoming line signal) after a period longer than a fixed duration, it will indicate DCE not ready by signalling r = 0, i = OFF (see § 2.5.2.2 above). The value of that duration is network dependent. Prior to this DCE not ready signal, the DTE should be prepared to receive garbled signals or contiguous binary 1 on circuit R with i = ON.
2.6.3	Signal element timing provision
	The signal element timing signal is delivered to the DTE on circuit S whenever possible, even when the DCE loses alignment or the incoming line signal. The signal element timing rate should in no case deviate from the nominal value by more than ± 1%.

3	Alignment of call control characters and error checking
	All characters for call control purposes are selected from International Alphabet No. 5 according to Recommendation T.50.
3.1	Character alignment
	For the interchange of information between the DTE and the DCE for call control purposes, it is necessary to establish correct alignment of characters. Each sequence of call control characters to and from the DCE shall be preceded by two or more contiguous 1/6 (SYN) characters.
3.1.1	Certain Administrations will require the DTE to align call control characters transmitted from the DTE to either SYN characters delivered to the DTE or to signals on the byte timing interchange circuit.
	Administrations who require this alignment shall provide the byte timing interchange circuit, but its use and termination by the DTE shall not be mandatory.
3.1.2	Certain Administrations will permit call control characters to be transmitted from the DTE independently of the SYN characters delivered to the DTE.
3.1.3	Additionally, for an intermediate period (see Note), Administrations will provide connection to the public data network of DTEs operating as described in § 3.1.2 above.
	Note – The intermediate period would be determined by customer demand and other relevant factors as interpreted by individual Administrations.
3.2	Error checking
	Odd parity according to Recommendation X.4 applies for IA5 characters interchanged for call control purposes.
4	Elements of the call control phase for circuit switched service
	The state diagram provided in Figure A–2/X.21, shows the relationship between the various call control phase states as defined below, together with the recognized transactions between these states under normal operating conditions. Illustrated examples of the time sequence relationships between these states and associated time–out operation are provided in Figures B–1/X.21 and B–2/X.21.
	States which are indicated by an IA5 character on circuits T and R shall be entered and exited on a character boundary. At this time, in some networks, the transition from state 6 to state 11, or state 6 to state 12 may not be on a character boundary.
	Once character alignment has been established by the DCE in response to an outgoing call request, or for presentation of an incoming call, the alignment will be maintained until entering connection in progress, state 11 or ready for data if state 11 is by–passed. This implies that all IA5 character sequences transmitted on circuit R, such as 2/11 (“+”), call progress signals, DCE–provided information, etc., appear on the same character boundary even if they are separated by two or more SYN characters.
	The call control phase can be terminated by either the DTE or the DCE by clearing as defined in § 6 below.
4.1	Events of the call control procedures (see Figure A–2/X.21)
4.1.1	Call request (state 2)
	The calling DTE shall indicate a request for a call by signalling steady binary condition t = 0, c = ON, provided that it was previously signalling DTE ready.
	The change of state from ready (t = 1, c = OFF) to call request (t = 0, c = ON) shall be such that the transition to t = 0 occurs within a maximum of 7 bit intervals of the transition to c = ON. Either transition may occur first.
	Note – When optimizing the use of the byte timing circuit B, the transition to t = 0 shall occur within the same bit interval as the transition to c = ON. This might become a requirement for use with special user facilities which might arise from further study.
	If the DTE signals call request (state 2) and the DCE simultaneously signals r = 0, i = OFF, the DCE will be assumed to be in state 19 (DCE clear indication).
4.1.2	Proceed to select (state 3)
	When the network is prepared to receive selection information the DCE will transmit continuously character 2/11 (“+”) preceded by 2 or more contiguous characters 1/6 (“SYN”) on the R circuit with i = OFF.
	Proceed–to–select is maintained until receipt of the end–of–selection signal, or in the case of direct call, receipt of DTE waiting.
	The proceed–to–select signal will start within 3 seconds of the call request being sent.
4.1.3	Selection signal sequence (state 4)
	The selection signal sequence shall be transmitted by the DTE on the T circuit with c = ON and shall be preceded by two or more contiguous 1/6 (“SYN”) characters with c = ON.
	The format of the selection signal sequence is defined in § 4.6.1 below.
	The information content and coding of the selection signal sequence is contained in Annex G and Recommendation X.121.
	The selection signal sequence shall start within 6 seconds of proceed–to–select being received and shall be completed within 36 seconds.
	The maximum permissible interval between individual selection characters is 6 seconds.
	The period, if any, between individual selection characters shall be filled by character 1/6 (“SYN”) with c = ON.
4.1.4	DTE waiting (state 5)
	During DTE waiting, the DTE signals steady binary condition t = 1, c = ON. (See also § 4.4 below for direct call conditions.)
4.1.5	Incoming call (state 8)
	The DCE will indicate an incoming call by continuous transmission of character 0/7 (“BEL”) preceded by two or more contiguous 1/6 (“SYN”) characters on the R circuit with i = OFF.
	If the DCE signals incoming call and the DTE simultaneously signals t = 0, c = OFF, the DTE will be assumed to be in state 16 (clear request).
	The connection of incoming calls will be inhibited when the DTE signals either DTE uncontrolled not ready or DTE controlled not ready.
4.1.6	Call accepted (state 9)
4.1.6.1	General case
	The DTE shall accept the incoming call as soon as possible by signalling the steady state binary condition t = 1, c = ON.
1)	The DCE will return to DCE ready if the incoming call is not accepted within 500 milliseconds,
	or, where manual answering is permitted,
2)	the DCE will return to DCE ready if the incoming call is not accepted within 60 seconds.
4.1.6.2	Sub–addressing
	Sub–addressing is an optional procedure.
	Two procedures for sub–addressing at the called end are defined: the simple sub–addressing procedure and the enhanced sub–addressing procedure. Choice of the provision of these procedures is a national matter.
4.1.6.2.1	Simple sub–addressing procedure (see Figure A–6/X.21)
	The procedure is as follows:
a)	Call accept, see § 4.1.6.1.
b)	DCE waiting, see § 4.1.7.
c)	DCE–provided information: when provided, sub–addressing information will be transmitted by the DCE to the called DTE after call accepted has been sent by the DTE, and prior to any other DCE–provided information if any.
	The format of sub–addressing information is defined in § 4.6.3 below.
	The information content of sub–addressing information is defined in Annex H.
d)	Connection in progress, see § 4.1.10.
e)	Ready for data, see § 4.1.11.
4.1.6.2.2	Enhanced sub–addressing procedure (see Figures A–5/X.21 and B–3/X.21)
4.1.6.2.2.1	Proceed with call information (state 9B)
	Note – State 9B is only entered in the case of a DTE with sub–addressing.
	The DTE shall accept the incoming call as soon as possible by transmitting continuously character 2/10 (“*”) preceded by 2 or more contiguous characters 1/6 (“SYN”) on the T circuit with c = OFF.
	Proceed with call information is maintained until receipt of end of call information signal. The proceed with call information signal will start within 500 ms of the incoming call signal being received.
4.1.6.2.2.2	Call information signal sequence (state 10C)
	Note – State 10C is only entered in the case of a DTE with sub–addressing.
	The call information signal sequence will be transmitted by the DCE on the R circuit with i = OFF and will appear on the same boundary as it was entered in state 8.
	The call information signal may be preceded by two or more contiguous 1/6 (“SYN”) characters.
	The call information is also a DCE–provided information (see also § 4.1.9).
	The information content and coding of the call information signal sequence is contained in Annex H and Recommendation X.121.
	The call information signal sequence will start and will be completed within 2 seconds after the proceed with call information being sent.
	The maximum period, if any, between individual call information characters will be filled by character 1/6 (“SYN”) with i = OFF.
	The format of call information is the same as the format of DCE–provided information and is defined in § 4.6.3 below.
4.1.6.2.2.3	DCE waiting (states 6D and 6C)
	During DCE waiting, the DCE will signal 2 or more contiguous 1/6 (“SYN”) characters with i = OFF.
4.1.6.2.2.4	DTE–provided information (state 25)
	The DTE–provided information shall be transmitted by the DTE with sub–addressing on circuit T with c = OFF.
	A DTE–provided information shall consist of 1 or more DTE–provided information blocks. Each DTE–provided information block shall be limited to a maximum length of 128 characters.

	Note – The figure of 128 characters maximum length is provisional and may be changed to another value in the future.
	The format of the DTE–provided information is defined in § 4.6.4 below.
	The coding of DTE–provided information should be in line with Annex F and Recommendation X.96.
	The DTE–provided information shall be sent on the same character boundary as it was entered in state 9B. DTE–provided information blocks within a DTE–provided information may be preceded and separated by 1/6 (“SYN”) characters.
	A DTE–provided information (state 25) shall be sent to the DCE within 20 seconds after the end of call information signal, character 2/11 (“+”) being received.
	After reception of a DTE–provided information block, the DCE will reset and restart time–out T14C.
4.1.7	DCE waiting (state 6A and state 6B)
	During DCE waiting, the DCE will signal two or more contiguous 1/6 (“SYN”) characters on the R circuit with i = OFF. In the state diagram, Figure A–2/X.21, state 6A applies to calling procedures and state 6B applies to called procedures.
4.1.8	Call progress signal (state 7)
	The call progress signal will be transmitted by the DCE to the calling DTE on the R circuit with i = OFF when an appropriate condition is encountered by the network.
	A call progress signal will consist of 1 or more call progress signal blocks. A call progress signal block will consist of 1 or more call progress signals.
	The format of the call progress signal sequence is defined in § 4.6.2 below.
	The coding of call progress signals is provided in Annex F.
	The description of call progress signals is provided in Recommendation X.96.
	A call progress signal will be preceded by two or more contiguous 1/6 (“SYN”) characters sent during state 6A. The period between these blocks will also be filled by DCE waiting (state 6A).
	A call progress signal will be transmitted by the DCE within 20 seconds of: (1) the end–of–selection signal or (2) in the case of direct call, the DTE waiting signal being sent by the DTE. The call progress signal, however, will not be sent by the DCE before the reception of the end–of–selection signal or DTE waiting signal is sent by the DTE, except in the case of expiration of time–out T11, T12, or T13 where there may be a call progress signal followed by clear indication.
	Note – When an error is detected in a received call progress signal sequence, the DTE may choose to either ignore the signal or attempt a new call after clearing.
4.1.9	DCE–provided information (states 10A and 10B)
	The DCE–provided information will be transmitted by a DCE to the calling DTE (state 10A) or a called DTE (state 10B) on circuit R with i = OFF.
	A DCE–provided information will consist of 1 or more DCE–provided information blocks. Each DCE–provided information block will be limited to a maximum length of 128 characters.
	The format of the DCE–provided information is defined in § 4.6.3 below.
	The information content of DCE–provided information is provided in Annex H.
	The DCE–provided information will be preceded by two or more contiguous 1/6 (“SYN”) characters. DCE–provided information blocks within a DCE–provided information will be separated by 1/6 (“SYN”) characters (the time between blocks to be filled by two or more SYN characters is for further study). In the case of a calling DTE (state 10A), the preceding and separating SYN characters will be from DCE waiting (state 6A). In the case of a called DTE (state 10B), the preceding SYN characters and the separating SYN characters will be from DCE waiting (state 6B).
	In certain circumstances, SYN characters may be inserted between characters within a DCE–provided information block. Each insertion shall contain at least 2 SYN characters, and the inserted SYN characters will be counted as part of the maximum limit of 128 characters per block. In any case, the insertion of SYN characters should be rare and minimized.
	A DCE–provided information (state 10B) will be sent to the called DTE within 6 seconds of the call accepted signal being sent. After reception of a DCE–provided information block, the called DTE should reset time–limit T4B.
4.1.9.1	Line identification
	Calling and called line identification is an optional additional facility.
	The information content of calling and called line identification is provided in Annex H.
	Calling and called line identification will be transmitted by the DCE on the R circuit with i = OFF during states 10B or 10A, respectively.
	When provided, called line identification (state 10A) will be transmitted by the DCE to the calling DTE after all call progress signals, if any.
	When provided, calling line identification (state 10B) will be transmitted by the DCE to the called DTE after call accepted has been sent by the DTE.
	In the case where the calling line identification facility is not provided by the originating network, or the called line identification facility is not provided by the destination network, a dummy line identification shall be provided by the DCE to the DTE. In some networks, when the calling line identification is not provided by the originating network, the DNIC will be provided by the DCE to the DTE in place of the dummy line identification.
4.1.9.2	Charging information
	Charging information is an optional additional facility provided during state 10B.
	Upon completion of clearing the call for which charging information has been requested, the DCE will, within 200 ms after entering ready (state 1), establish an incoming call to the DTE for the purpose of giving charging information.
	Note – The DTE is advised not to signal call request or not ready during the above 200 ms period. If the DTE does, the charging information will not be transmitted to the DTE.
	Charging information will be transmitted by the DCE on R circuit with i = OFF.
	The DCE will send clear indication (state 19) upon sending the last charging information block. The DTE should send clear request (state 16) when it has correctly received the charging information signal, if the DCE has not previously signalled clear indication.
	The format of charging information is defined in § 4.6.3 below.
4.1.10	Connection in progress (state 11)
	While the connection process is in progress, the DCE will indicate connection in progress (state 11) by signalling r = 1, i = OFF.
	In some circumstances, connection in progress (state 11) may be bypassed.
4.1.11	Ready for data (state 12)
	When the connection is available for data transfer between both DTEs, the DCE will indicate ready for data (state 12) by signalling r = 1, i = ON.
1)	Ready for data will be indicated by the DCE to the calling DTE within 6 seconds of the last call progress signal or DCE–provided information signals being received by the DTE or within 20 seconds of the end–of–selection signal being signalled by the DTE,
	or, when manual answering is permitted at the called DTE.
2)	Ready for data will be indicated by the DCE to the calling DTE within 60 seconds of the appropriate call progress signal being received or within 20 seconds of the end–of–selection signal being received.
	It will be indicated to the called DTE within 6 seconds of call accepted being signalled by the DTE or receipt of DCE–provided information signal.
	Subsequent procedures are described in § 5 below, data transfer phase.
4.1.12	Events of the call control procedure for centralized multipoint circuit–switched service
4.1.12.1	Call request (state 2)
	See § 4.1.1.
4.1.12.2	Proceed to select request (state 3)
	See § 4.1.2.
4.1.12.3	Selection signal sequence (state 4)
	See § 4.1.3.
	A facility request signal is used to indicate the category of point–to–multipoint service which is required.
	The coding is defined in Annex G.
4.1.12.4	DTE waiting (state 5)
	See § 4.1.4.
4.1.12.5	Incoming call (state 8)
	See § 4.1.5.
4.1.12.6	Call accepted (state 9)
	See § 4.1.6.1.
4.1.12.7	DCE waiting (state 6A and state 6B)
	See § 4.1.7.
4.1.12.8	Call progress signal sequence (state 7)
	See § 4.1.8.
	In a point–to–multipoint call the call progress signals related to each of the called DTEs are transmitted and then in the same order, the called line identification signals of the different called DTEs.
	When no specific call progress signals are necessary for a given called DTE, then the call progress signal “00” is used for this DTE so that the order can be kept.
4.1.12.9	DCE–provided information sequence (states 10A and 10B)
	The DCE–provided information sequences will be transmitted by a DCE to the calling DTE (state 10A) or a called DTE (state 10B) on circuit R with i = OFF.
	A DCE–provided information sequence will consist of one or more DCE–provided information blocks. Each DCE–provided information block will be limited to a maximum length of 128 characters, except for called line identification in case of point–to–multipoint calls where the maximum length is 512 characters.
	The format of the DCE–provided information sequence is defined in § 4.6.3 below.
	The information content of DCE–provided information is provided in Annex H.
	The DCE–provided information sequence will be preceded by two or more contiguous 1/6 (“SYN”) characters. DCE–provided information blocks within a DCE–provided information sequence will be separated by 1/6 (“SYN”) characters (the time between blocks to be filled by two or more SYN characters is for further study). In the case of a calling DTE (state 10A), the preceding and separating SYN characters will be from DCE waiting (state 6A). In the case of a called DTE (state 10B), the preceding SYN characters and the separating SYN characters will be from DCE waiting (state 6B).
	In certain circumstances, SYN characters may be inserted between characters within a DCE–provided information block. Each insertion shall contain at least 2 SYN characters, and the inserted SYN characters will be counted as part of the maximum limit of 128 characters per block. In any case, the insertion of SYN characters should be rare and minimized.
	A DCE–provided information sequence (state 10B) will be sent to the called DTE within 6 s of the call accepted signal being sent. After reception of a DCE–provided information block, the called DTE should reset time–limit T4.
4.1.12.9.1	Line identification
	The called line identification related to the different called DTEs is provided in sequence.
	See § 4.1.9.1.
4.1.12.9.2	Charging information
	See § 4.1.9.2.
4.1.12.10	Connection in progress (state 11)
	See § 4.1.10.
4.1.12.11	Ready for data (state 12)
	See § 4.1.11.
4.2	Unsuccessful call
	If the required connection cannot be established, the DCE will indicate this and the reason to the calling DTE by means of a call progress signal. Afterwards the DCE will signal DCE clear indication (state 19).
4.3	Call collision (state 15)
	A call collision is detected by a DTE when it receives incoming call in response to call request. The DTE shall not deliberately cause a call collision by responding to incoming call with call request.
	A call collision is detected by a DCE when it receives call request in response to incoming call.
	When a call collision is detected by the DCE, the DCE will indicate proceed–to–select (state 3) and cancel the incoming call.
4.4	Direct call
	For a direct call facility, the entering of DTE waiting (state 5) directly upon receipt of proceed–to–select (state 3) indicates the request for the direct call. When the direct call facility is provided on a per–call basis, the DTE may choose either an addressed call by presenting selection signal (state 4) or a direct call by presenting DTE waiting (state 5). When the direct call facility only is provided on a subscription basis, selection signals (state 4) are always bypassed.
4.5	Facility registration/cancellation procedure
	Registration/cancellation of optional user facilities shall be accomplished by a DTE using normal call establishment procedures using the selection sequence which is defined in § 4.6.1 below.
	The format of the facility registration/cancellation signal is defined in § 4.6.1.3 below.
	The facility registration/cancellation procedure shall not be combined with establishment of a normally addressed call, but shall be taken as an independent procedure.
	In response to acceptance or rejection of the facility registration/cancellation actions, the network will provide the appropriate call progress signal followed by clear indication.
4.6	Selection, call progress and DCE provided information formats
	(See also Annex D for a syntactic description of the formats.)
4.6.1	Format of selection sequence
	A selection sequence shall consist of a facility request block, or an address block, or a facility request block followed by an address block, or a facility registration/cancellation block.
4.6.1.1	Facility request block
	A facility request block shall consist of one or more facility request signals.
	Multiple facility request signals shall be separated by character 2/12 (“ , ”).
	A facility request signal shall consist of a facility request code and may contain one or more facility parameters. The facility request code, facility parameter and subsequent facility parameters shall be separated by character 2/15 (“ / ”). For an interim period the 2/15 (“ / ”) separator will not be used in some networks.
	The end of a facility request block shall be indicated by character 2/13 (“–”).
4.6.1.2	Address block
	An address block shall consist of one or more address signals.
	An address signal shall consist of either a full address signal or an abbreviated address signal.
	Start of an abbreviated address signal shall be indicated by a prefix character 2/14 (“ . ”).
	Multiple address signals shall be separated by character 2/12 (“ , ”).
4.6.1.3	Facility registration/cancellation block
	A facility registration/cancellation block shall consist of one or more facility registration/cancellation signals.
	A facility registration/cancellation signal shall consist of up to four elements in order: facility request code, indicator, registration parameter, address signal.
	The elements of a facility registration/cancellation signal shall be separated by character 2/15 (“ / ”).
	If a facility registration/cancellation signal contains less than four of the elements, the elements should be eliminated in reverse order (e.g., a two–element facility registration/cancellation signal will contain the facility request code “ / ” indicator). If any element to be sent within the sequence is not required, a 3/0 (“0”) character should be inserted in the position of each missing element (e.g., facility request code /0/0/ address signal).
	Multiple facility registration/cancellation signals shall be separated by character 2/12 (“ , ”).
	The end of a facility registration/cancellation block shall be indicated by character 2/13 (“–”) and shall be followed by an end of selection.
4.6.1.4	End of selection
	The end of selection shall be indicated by character 2/11 (“+”).
4.6.2	Format of a call progress block
	A call progress block shall consist of one or more call progress signals.
	A call progress signal shall consist of a call progress code and may contain an indicator.
	The call progress code and the indicator shall be separated by character 2/13 (“–”).
	Each call progress signal need not be repeated.
	Multiple call progress signals shall be separated by character 2/12 (“ , ”).
	The end of a call progress block shall be indicated by character 2/11 (“+”).
4.6.3	Formats of DCE–provided information
	The following formats are specified for DCE–provided information signals which have been identified.
	The DCE–provided information shall, except for calling and called line identification, be started by the IA5 character 2/15 (“ / ”). To distinguish between different types of DCE–provided information the prefix should be followed by one or more numerical characters, followed by the character 2/15 (“ / ”) before the actual information is presented. The end of a DCE–provided information block shall be indicated by character 2/11 (“+”). The order in which the DCE–provided information blocks are presented to the DTE is variable.
	Multiple DCE–provided information signals shall be separated by character 2/12 (“,”).
	A dummy DCE–provided information block may be sent in the case of sub–addressing and will be indicated by the prefix as described above (“/”, “4”, “/”) followed by 2/11 (“+”).
	The dummy sub–address should be sent if the network supports sub–addressing but no sub–address has been sent by the calling DTE.
4.6.3.1	Format of called and calling line identification
	Calling line identification block and called line identification block shall be preceded by character 2/10 (“ * ”).
	When a calling or called line identification block contains Data Network Identification Codes (DNIC) or Data Country Codes (DCC), the block shall instead of one character 2/10 (“ * ”) be preceded by 2 characters 2/10 (“ ** ”).
	A called line identification block shall consist of one or more called line identification signals.
	Multiple called line identification signals shall be separated by character 2/12 (“ , ”).
	End of calling line identification block and called line identification block shall be indicated by character 2/11 (“ + ”).
	The dummy line identification block shall be indicated by character 2/10 (“ * ”) followed by 2/11 (“+”).
4.6.3.2	Format of charging information
	The charging information block will be preceded by character 2/15 (“ / ”) followed by a second IA5 numerical character, followed by character 2/15 (“ / ”). The end of charging information block shall be indicated by character 2/11 (“+”).
4.6.4	Format of DTE–provided information
	A DTE–provided information block shall consist of 1 or more DTE–provided information signals.
	Each DTE–provided information signal need not be repeated.
	Multiple DTE–provided information signals shall be separated by character 2/12 (“,”).
	End of DTE–provided information block shall be indicated by character 2/11 (“+”).
5	Data transfer phase
	During the data transfer phase, any bit sequence may be sent by either DTE.
	For the interchange of information between one DTE and another DTE during the data transfer phase, the DTEs will be responsible for establishing their own alignment.
	The byte timing interchange circuit, when implemented, may be utilized by the DTEs for mutual character alignment.
	Data link control procedures and any other DTE–to–DTE protocols are not the subject of this Recommendation.
5.1	Circuit–switched service
	All bits sent by a DTE after indication of ready for data for 16–bit intervals (see § 2.4) and before sending DTE clear request will be delivered to the corresponding DTE after that corresponding DTE has received ready for data and before it has received DCE clear indication (provided that the corresponding DTE does not take the initiative of clearing).
	All bits received by a DTE, after indication of ready for data for 16–bit intervals (see § 2.4) and before receiving DCE clear indication or receiving DCE clear confirmation, were sent by the corresponding DTE. Some of those bits may have originated as DTE waiting before that corresponding DTE has received ready for data; those bits are binary 1.
	During data transfer (state 13), c = ON, i = ON and data are transferred on circuits T and R.
	Data transfer may be terminated by clearing, as defined in § 6 below, by either:
i)	the DCE, or
ii)	any connected DTE.
	The action to be taken when circuit C is turned OFF during data transfer (state 13), except when the DTE is signalling DTE clear request (state 16) by t = 0, c = OFF, is for further study except for the procedures for half–duplex operation between DTEs conforming to Recommendations X.21 and X.21 bis as described in Annex E.
5.2	Leased circuit service – point–to–point (see Figure A–3/X.21) and packet–switched service (Recommendation X.25, level 1)
	In this section, for the case of packet–switched service, one of the DTEs must be understood as being the packet network data switching exchange (DSE).
	Data transmitted by the DTE on circuit T with c = ON are delivered to the remote DTE on circuit R with i = ON.
	Both DTEs may employ duplex operation for the exchange of data.
	Any bit sequence may be sent by either DTE during the ON–condition of its circuit C.
	Note – The entering of the DTE/DCE–interface of DTE uncontrolled not ready (state 22) will be signalled on the remote end as DCE not ready (state 18).
	In Figure A–3/X.21 a state diagram indicating a possible data connection is shown. Apart from state 13, two additional states, 13S and 13R, can be identified.
5.2.1	Send data (state 13S)
	Data transmitted by the DTE on circuit T with c = ON are delivered to the remote DTE on circuit R with i = ON.
5.2.2	Receive data (state 13R)
	Data transmitted by a distant DTE with c = ON are received on circuit R with i = ON.
5.2.3	Data transfer (state 13)
	When c = ON, i = ON, data are transferred on circuits T and R.
5.2.4	Termination of data transfer
	The DTE signals the termination of data transfer by signalling t = 1, c = OFF. The DCE indicates termination of data transfer by signalling r = 1, i = OFF.
	Note – The action taken by the DCE when the DTE signals c = OFF and t does not equal 1, is for further study except for the DTE uncontrolled not ready procedures described in § 2.5.1.2 above.
5.3	Leased circuit service – centralized multipoint (see Figure A–3/X.21)
5.3.1	Central DTE data transfer
5.3.1.1	Send data (state 13S)
	Data transmitted by the central DTE on circuit T with c = ON are delivered to all remote DTEs on circuit R with i = ON.
5.3.1.2	Receive data (state 13R)
	Data transmitted by any remote DTE with c = ON (one at a time as determined by the data link protocol) during state 13S are delivered to the central DTE on circuit R with i = ON.
5.3.2	Remote DTE data transfer
	Data transmitted by a remote DTE are not delivered to other remote DTEs.
	Note – Transmission of data by two or more remote DTEs at the same time may result in unsatisfactory conditions.
5.3.2.1	Send data (state 13S)
	Data transmitted by remote DTEs with c = ON (one at a time as determined by the data link protocol) are delivered to the central DTE on circuit R with i = ON.
5.3.2.2	Receive data (state 13R)
	Data transmitted by the central DTE with c = ON are delivered to the remote DTE on circuit R with i = ON.
5.3.3	Data transfer (state 13)
	When c = ON, i = ON data transmitted by the central DTE are delivered to all remote DTEs, and data transmitted by a remote DTE (one at a time as determined by data link protocol) are delivered to the central DTE. A remote DTE may send (one at a time as determined by the data link protocol) while the central DTE is sending to all remote DTEs.
5.4	Circuit–switched service – Point–to–multipoint service
	The different configurations of point–to–multipoint are defined in Recommendation X.2.
5.4.1	Centralized multipoint
	All bits sent by the central DTE after indication of ready for data for 16–bit intervals (see § 2.4) and before clearing procedure has been started by the central DTE or by the network, will be delivered to all remote DTEs after they have received ready for data and before they have received DCE clear indication (provided that the remote DTEs do not take the initiative of clearing).
	All bits received by a remote DTE, after indication of ready for data for 16–bit intervals (see § 2.4) and before clearing procedure has been started by the central DTE, by the network or the remote DTE, were sent by the central DTE. Some of those may have originated as DTE waiting before the central DTE has received ready for data; those bits are binary 1.
	All bits sent by a remote DTE, after indication of ready for data for 16–bit intervals (see § 2.4) and before clearing procedure has been started by the central DTE, by the network or by the remote DTE, will be delivered to the central DTE after that central DTE has received ready for data and before it has received DCE clear confirmation or DCE clear indication, provided that the the other remote DTEs are transmitting binary 1.
	All bits received by the central DTE, after receiving ready for data for 16–bit intervals (see § 2.4) and before receiving DCE clear indication or DCE clear confirmation, were sent by one of the remote DTEs. Some of these may have originated as DTE waiting before the remote DTEs have received ready for data; those bits are binary 1.
	During data transfer (state 13), c = ON, i = ON and data are transferred on circuits T and R.
	Data transfer may be terminated by clearing, as defined in § 6 below, by either:
i)	the central DTE or,
ii)	all the remote DTEs or,
iii)	the DCEs.
6	Clearing phase (see Figure A–4/X.21)
	In centralized multipoint calls:
–	clearing by the central DTE imply clearing of the call;
–	clearing by a remote DTE clears the call for this DTE, and has no effect on the calls which remain established for the other remote DTEs;
–	clearing by the last remote DTE still in the call leads to the clearing of the call.
6.1	Clearing by the DTE (states 16, 17, 21)
	The DTE should indicate clearing by signalling the steady binary condition t = 0, c = OFF, DTE clear request (state 16).
	The DCE will respond by signalling the steady state condition r = 0, i = OFF, DCE clear confirmation (state 17), followed by the steady binary condition r = 1, i = OFF, DCE ready (state 21). The DCE ready signal will be sent within 2 seconds after the receipt of the DTE clear request signal.
	The DTE shall recognize DCE clear confirmation and, except as noted below, shall then respond to DCE ready, when presented, within 100 millisecondes by signalling t = 1, c = OFF, ready (state 1).
	In the case where DCE clear confirmation is either not presented by the DCE or not recognized by the DTE, the DTE shall remain in the DTE clear request state for a minimum of 2 seconds and then go to DTE ready. In this case, the DTE may not respond to DCE ready within the 100 milliseconds stipulated above and may be considered by the DCE to be uncontrolled not ready (state 24) for a finite period of time (until it goes to DTE ready).
6.2	Clearing by the DCE (states 19, 20, 21)
	The DCE will indicate clearing to the DTE by signalling the steady binary condition r = 0, i = OFF, DCE clear indication (state 19).
	The DTE should signify DTE clear confirmation (state 20) by signalling the steady binary condition t = 0, c = OFF, within 500 milliseconds. The DCE will signal r = 1, i = OFF, DCE ready (state 21) within 2 seconds of receiving DTE clear confirmation.
	The DTE should respond to DCE ready within 100 milliseconds by signalling t = 1, c = OFF, ready (state 1).
7	Test loops
	The definitions of the test loops and the principles of maintenance testing using the test loops are provided in Recommendation X.150.
7.1	DTE test loop – type 1 loop
	This loop is used as a basic test of the operation of the DTE, by looping back the transmitted signals inside the DTE for checking. The loop should be set up inside the DTE as close as possible to the DTE/DCE interface.
	While the DTE is in the loop 1 test condition:
–	circuit T is connected to circuit R inside of the DTE;
–	circuit C is connected to circuit I inside of the DTE;
–	the DCE continues to present signal element timing on circuit S and, if implemented, byte timing on circuit B. The DTE need not make use of the timing information.
	Loop 1 may be established from either the data transfer or ready state.
	In some networks, for short routine tests during the data transfer state, the DTE should either maintain the same status on the interchange circuits as before the test or send the controlled not ready signal. If the loop is established from the data transfer state, the DCE may continue to deliver data to the DTE during the test as though the DTE were in normal operation. It will be the responsibility of the DTEs to recover from any errors that might occur while the test loop is activated.
	If the loop is established from the ready state, the DTE should signal one of the not ready states.
7.2	Local test loop – type 3 loop
	Local test loops (type 3 loops) are used to test the operation of the DTE, the interconnecting cable and either all or parts of the local DCE, as discussed below.
	Loop 3 may be established from any state.
	For testing on leased circuits and for short duration testing on circuit–switched connections the DCE should either continue to present toward the line the conditions that existed before the test (e.g. either data transfer or ready state) or send the controlled not ready state to the remote DTE. Where this is not practical (e.g. in some cases for loop 3a) or desirable (e.g. for long duration testing in circuit–switched applications) the DCE should terminate an existing call and, if possible, signal toward the subscriber–line one of the not ready states.
	Manual and/or automatic control should be provided on the DCE for activation of the test loop.
	The precise implementation of the test loop within the DCE is a national option. At least one of the following local loops should be implemented:
7.2.1	Loop 3d
	This loop is used to test the operation of the DTE, including the interconnecting cable, by returning transmitted signals to the DTE for checking. The loop is set up inside the local DCE and does not include interchange circuit generators and loads.
	While the DCE is in the loop 3d test condition:
–	circuit T is connected to circuit R inside of the DCE;
–	circuit C is connected to circuit I inside of the DCE;
–	the DCE continues to present signal element timing on circuit S and, if implemented, byte timing on circuit B. The DTE must make use of the timing information.
	Note – While test loop 3d is operated, the effective length of the interface cable is doubled. Therefore, to insure proper operation of loop 3d, the maximum DTE/DCE interface cable length should be one–half the length normally appropriate for the data signalling rate in use.
7.2.2	Loop 3c
	This loop is used to test the operation of the DTE, including the interconnecting cable and DCE interchange circuit generators and loads.
	The configuration is identical to that given for loop 3d in § 7.2.1 with the exception that the looping of circuit T to circuit R and the looping of circuit C to circuit I includes the interchange circuit generators and loads. The note concerning restriction of interface cable length is not applicable.
7.2.3	Loop 3b
	This loop is used as a test of the operation of the DTE and the line coding and control logic and circuitry of the DCE. It includes all the circuitry of the DCE with the exclusion of the line signal conditioning circuitry (e.g. impedance matching transformers, amplifiers, equalizers, etc.). The delay between transmitted and received test data is a few octets (see Note).
	The configuration is identical to that given for loop 3c in § 7.2.2 except for the location of the point of loopback.
	Note – In some DCEs, the setting of loop 3b will result in momentary loss of envelope alignment causing random signals to appear on the receiving interchange circuit for a period of time. This may impact upon the DTE test procedure. In some networks the setting of loop 3b will cause clearing of existing connections.
7.2.4	Loop 3a
	This loop is used to test the operation of the DTE and the DCE. The loop should include the maximum amount of circuitry used in DCE working including, in particular, the line signal conditioning circuitry. It is recognized that, in some cases, the inclusion of devices (e.g. attenuators, equalizers or test loop translators) may be necessary in the loopback path. The subscriber line is suitably terminated during a loop 3a test condition. The delay between transmitted and received test data is a few octets (see Note).
	The configuration is identical to that given for test loop 3b in § 7.2.3 except for the location of the point of loopback.
	Note – In some DCEs, the setting of loop 3a will result in momentary loss of envelope alignment causing random signals to appear on the receiving interchange circuit for a period of time. This may impact upon the DTE test procedure. In some networks the setting of loop 3a will cause clearing of existing connections.
7.2.5	Automatic operation of test loop 3 (see Figure A–9/X.21)
	The procedure provides for transparent loop testing and may be entered from any state.
7.2.5.1	Send loop 3 command (state L31)
	The testing DTE shall indicate a request for a local loop 3 by signalling t = 00001111 (alternate bit quadruples are binary 0 and binary 1), c = OFF. The loop command shall persist until the DCE signals r = 00001111..., i = OFF, but not longer than 6 s. Some networks may require the loop command to be preceded by 2 or more contiguous 1/6 (“SYN”) characters and to appear on a character boundary 00001111. Some networks will not require the preceding SYN–characters to be sent, i.e. they will treat the loop command as a bit pattern which, therefore, does not need to appear on a character boundary. However, this would impose no restrictions on DTEs sending the loop command on a character boundary with preceding SYN–characters.
7.2.5.2	Loop 3 confirmation (state L32)
	The DCE indicates that the local loop 3 is established by signalling r = 00001111, i = OFF.
	Note – This bit pattern received on circuit R is the loop command reflected by the local loop 3.
7.2.5.3	Test data (state L33)
	The DTE enters the transparent test data state by turning c = ON. During the test any bit sequence may be sent by the DTE. The looped back data are received on circuit R with i = ON.
7.2.5.4	Loop 3 clear request (state L34A)
	The DTE signals the termination of the test data by turning c = OFF.
7.2.5.5	Loop 3 clear request (state L34B)
	In cases where the DTE does not wish to enter state L33 it may leave state L32 by signalling t ¹ 00001111, c = OFF for a minimum time of 24 bits.
7.2.5.6	Loop 3 clear confirmation (state L35)
	Release of the loop is confirmed by the DCE signalling r  00001111, i = OFF.
7.3	Network test loop – type 2 loop
	Network test loops (type 2 loops) are used by the Administration's test centre to test the operation of the leased line or subscriber line and either all or part of the DCE, as discussed below.
7.3.1	General
	Loop 2 may be controlled manually on the DCE or automatically from the network or where allowed by national testing principles automatically from the remote DTE.
	In case of a collision between call request and the activation of the loop, the loop activation command will have priority.
	When the test is in progress, the DCE will signal r = 0, i = OFF or r = 0101, i = OFF. The choice as to which of these signals is sent is a national matter.
7.3.2	Automatic operation of test loop 2 (see Figures A–7/X.21 and A–8/X.21)
	The procedure provides for transparent loop testing and is entered from the data transfer phase, state 13 in circuit switched service point–to–point. It may also be entered from any state in leased circuit service.
7.3.2.1	Send loop 2 command (state L21)
	The testing DTE shall indicate a request for a remote loop 2 by signalling t = 00110011 (alternate bit pairs are binary 0 and binary 1), c = OFF. The loop command shall persist until the DCE signals r = 00110011 . . . , i = OFF, but not longer than 2 s. Some networks may require the loop command to be preceded by 2 or more contiguous 1/6 (“SYN”) characters and to appear on a character boundary 00110011. Some networks will not require the preceding SYN–characters to be sent, i.e. they will treat the loop command as a bit pattern which, therefore, does not need to appear on a character boundary. However, this would impose no restrictions on DTEs sending the loop command on a character boundary with preceding SYN–characters.
7.3.2.2	Loop 2 confirmation (state L22)
	The DCE indicates that the remote loop 2 is established by signalling r = 001100 . . . , i = OFF.
	Note – This bit pattern received on circuit R is the loop command reflected by the remote loop 2.
7.3.2.3	Test data (state L23)
	The DTE enters the transparent test data state by turning c = ON.
	During the test any bit sequence may be sent by the DTE. The looped back data are received on circuit R with i = ON.
	Note – Allowance must be made for propagation delay in the network.
7.3.2.4	Loop 2 clear request (state L24A)
	The DTE signals the termination of the test data state by turning c = OFF.
	In the case where the DTE wishes to clear the connection it signals t = 0, c = OFF (state 16).
	In the case where the DTE wishes to re–enter the data transfer phase it signals t ¹ 0 ¹ 0011, c = OFF until the DCE signals state L25 loop 2 clear confirmation, r ¹ 0 ¹ 0011, i = OFF. After that, the DTE re–enters the data transfer phase by signalling t = D, c = ON.
7.3.2.5	Loop 2 clear request (state L24B)
	In cases where the DTE does not wish to enter state L23 it may leave state L22 by signalling t  0011, c = OFF for a minimum time of 24 bits.
	In the case where the DTE wishes to clear the connection it signals t = 0, c = OFF (state 16).
	In the case where the DTE wishes to re–enter the data transfer phase it signals t ¹ 0¹ 0011, c = OFF until the DCE signals state L25 loop 2 clear confirmation, r ¹ 0 ¹ 0011, i = OFF. After that, the DTE re–enters the data transfer phase by signalling t = D, c = ON.
7.3.2.6	Loop 2 clear confirmation (state L25)
	Release of the loop is confirmed by the DCE signalling r ¹ 0011 . . . , i = OFF.
	Note – The DCE signalling of r = 0, i = OFF must be interpreted by the DTE as loop clear confirmation and DCE clear indication (state 19).
7.3.2.7	Receive loop 2 command (state L26)
	The DCE will indicate the receipt of a loop command by transmission of 0011 . . . on circuit R with i = OFF.
	Note – In some networks state L26 will be bypassed if the loop 2 is operated from the Administration's test centre.
7.3.2.8	Loop 2 consent (state L26A)
	The DTE of the tested station will indicate its readiness for a loop test by signalling t = X, c = OFF.
	Note – Some networks may require this state for additional security against malicious test loop operation.
7.3.2.9	DCE controlled not ready (state L27)
	When the DCE has closed the loop 2 it transmits 0101 . . . on circuit R and i = OFF to the DTE.
	This DTE should not interpret this state as a clear indication, if it was in the data transfer phase before the test procedure began.
7.3.2.10	Loop 2 released (state L28)
	When the DCE stops transmitting 0101 . . . for more than 24 bits on circuit R, the DTE is informed that it may continue with the state it had left at the beginnng of state L27.
7.3.2.11	DCE not ready (state L29)
	In the case when the DCE is not able to send DCE controlled not ready, it will signal DCE not ready (state L29). This state will persist until the loop is released.
	Note – It is not possible to re–enter the data transfer phase in this case.
7.3.3	Implementation of type 2 loops
	The precise implementation of the test loop within the DCE is a national option. At least one of the following network test loops should be implemented:
7.3.3.1	Loop 2b
	This loop is used by either the Administration's test centre(s) and/or the remote DTE to test the operation of the subscriber line and all the circuitry of the DCE with the exception of interchange circuit generators and loads.
	While the DCE is in the loop 2b test condition:
–	circuit R is connected to circuit T inside of the DCE,
–	circuit I is connected to circuit C inside of the DCE,
–	at the interface, the DCE signals r = 0, i = OFF, or where provided r = 0101 . . ., i = OFF,
–	the DCE provides timing information on circuits S and, if implemented, on circuit B.
7.3.3.2	Loop 2a
	This loop is used by either the Administration's test centre(s) or the remote DTE to test the operation of the subscriber line and the entire DCE.
	The configuration is identical to that given for loop 2b in § 7.3.3.1 except for the location of the point of loop back. Alternatively, the DCE may present an open circuit or power off condition on circuits R and I.
7.4	Subscriber–line test loop – type 4 loop
	Subscriber–line test loops (type 4 loops) are provided for the maintenance of lines by the Administrations.
	Note – In the case of loops 4 and 2 (see § 7.3 above) the DCE may signal the local DTE in such a manner that the DTE can distinguish a test mode from a network failure. This is for further study.
7.4.1	Loop 4a
	This loop is only provided in the case of 4–wire subscriber lines. Loop 4a is for the maintenance of lines by Administrations. When receiving and transmitting pairs are connected together, the resulting circuit cannot be considered normal. Loop 4a may be established inside the DCE or in a separate device.
	While the DCE is in the loop 4a test condition:
–	the DCE signals to the local DTE r = 0, i = OFF, or where provided r = 0101 . . ., i = OFF.
–	the DCE provides timing information on circuit S and, if implemented, circuit B.
7.4.2	Loop 4b
	This loop is used by Administrations to test the operation of the subscriber line including the line signal conditioning circuitry in the DCE. When the receiving and transmitting circuits are connected at this point, loop 4b provides a connection that can be considered as normal; however, some impairment of the performance is expected since the DCE does not perform a complete signal regeneration.
	The configuration is identical to that given for loop 4a in § 7.4.1 except for the location of the point of the loopback.
7.5	Signal element timing provision
	The provision of signal element timing to the DTE is maintained when any of the loops, described above, are activated.
	When test loops are activated, the signal element timing should in no case deviate from the nominal value by more than ± 1%.

ANNEX A
(to Recommendation X.21)
Interface signalling state diagrams
Definition of symbols used in the state diagrams

FIGURE A-1/X.21	CCITT-38351

FIGURE A-2/X21	CCITT-38360

FIGURE A-3/X.21	CCITT-25030

FIGURE A-4/X.21	CCITT-25042

FIGURE A-5/X.21	CCITT-61370

FIGURE A-6/X.21	CCITT-61380

FIGURE A-7/X.21	CCITT-85170

FIGURE A-8/X.21	CCITT-85180

FIGURE A-9/X.21	CCITT-69450