DC Professional (TM) DC Expert (TM) DC Ultra (TM) FloorPlan Manager (TM) HDL Compiler (TM) VHDL Compiler (TM) Library Compiler (TM) DesignWare Developer (TM) DFT Compiler (TM) BSD Compiler Power Compiler (TM) Version X-2005.09-SP2 for linux -- Jan 03, 2006 Copyright (c) 1988-2006 by Synopsys, Inc. ALL RIGHTS RESERVED This software and the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software is subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc. The above trademark notice does not imply that you are licensed to use all of the listed products. You are licensed to use only those products for which you have lawfully obtained a valid license key. Initializing... #========================================================================= # TCL Script File for Synthesis using Synopsys Design Compiler #------------------------------------------------------------------------- # $Id: synth.tcl,v 1.1 2007/03/19 02:58:40 jiawen Exp $ # # The makefile will generate various variables which we now read in # and then display source make_generated_vars.tcl mkRasterizer echo ${SEARCH_PATH} /mit/6.375/tools/bluespec/new/lib/Verilog ../../../src ../../bsc-compile echo ${DONT_TOUCH} echo ${VERILOG_SRCS} FIFO2.v FIFOLevel.v SizedFIFO.v mkRasterizer.v echo ${VERILOG_TOPLEVEL} mkRasterizer # The library setup is kept in a separate tcl file which we now source source libs.tcl 1 # Set some options set_ultra_optimization Information: DC ultra optimization mode successfully set. (UIO-73) 1 set synlib_enable_dpgen true true set synlib_prefer_ultra_license true true set compile_new_boolean_structure true true # These two commands read in your verilog source analyze -library WORK -format verilog ${VERILOG_SRCS} Running PRESTO HDLC Searching for ./FIFO2.v Searching for /mit/6.375/tools/syn/current/libraries/syn/FIFO2.v Searching for /mit/6.375/tools/syn/current/dw/sim_ver/FIFO2.v Searching for /mit/6.375/tools/bluespec/new/lib/Verilog/FIFO2.v Searching for ./FIFOLevel.v Searching for /mit/6.375/tools/syn/current/libraries/syn/FIFOLevel.v Searching for /mit/6.375/tools/syn/current/dw/sim_ver/FIFOLevel.v Searching for /mit/6.375/tools/bluespec/new/lib/Verilog/FIFOLevel.v Searching for ./SizedFIFO.v Searching for /mit/6.375/tools/syn/current/libraries/syn/SizedFIFO.v Searching for /mit/6.375/tools/syn/current/dw/sim_ver/SizedFIFO.v Searching for /mit/6.375/tools/bluespec/new/lib/Verilog/SizedFIFO.v Searching for ./mkRasterizer.v Searching for /mit/6.375/tools/syn/current/libraries/syn/mkRasterizer.v Searching for /mit/6.375/tools/syn/current/dw/sim_ver/mkRasterizer.v Searching for /mit/6.375/tools/bluespec/new/lib/Verilog/mkRasterizer.v Searching for ../../../src/mkRasterizer.v Searching for ../../bsc-compile/mkRasterizer.v Compiling source file /mit/6.375/tools/bluespec/new/lib/Verilog/FIFO2.v Compiling source file /mit/6.375/tools/bluespec/new/lib/Verilog/FIFOLevel.v Compiling source file /mit/6.375/tools/bluespec/new/lib/Verilog/SizedFIFO.v Compiling source file ../../bsc-compile/mkRasterizer.v Presto compilation completed successfully. Loading db file '/mit/6.375/tools/syn/current/libraries/syn/dw_foundation.sldb' Loading db file '/mit/6.375/libs/tsl180/tsl18fs120/db/tsl18fs120_typ.db' 1 elaborate ${VERILOG_TOPLEVEL} -architecture verilog -library WORK Loading db file '/mit/6.375/tools/syn/current/libraries/syn/gtech.db' Loading db file '/mit/6.375/tools/syn/current/libraries/syn/standard.sldb' Loading link library 'tsl18fs120_typ' Loading link library 'gtech' Running PRESTO HDLC Statistics for case statements in always block at line 3325 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3326 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3402: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3399 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3402 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3431: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3424 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3431 | auto/user | =============================================== Statistics for case statements in always block at line 3483 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3485 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3501: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3497 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3501 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3523: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3516 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3523 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3547: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3540 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3547 | auto/user | =============================================== Statistics for case statements in always block at line 3599 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3601 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3617: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3613 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3617 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3639: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3632 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3639 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3663: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3656 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3663 | auto/user | =============================================== Statistics for case statements in always block at line 3715 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3717 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3733: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3729 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3733 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3755: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3748 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3755 | auto/user | =============================================== Statistics for case statements in always block at line 3804 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3806 | auto/auto | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3849: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3842 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3849 | auto/user | =============================================== Statistics for case statements in always block at line 3904 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3906 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3922: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3918 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3922 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3945: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3938 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3945 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:3988: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 3984 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 3988 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4016: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4009 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4016 | auto/user | =============================================== Statistics for case statements in always block at line 4076 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4078 | auto/no | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4095: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4091 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4095 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4119: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4112 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4119 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4178: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4167 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4178 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4238: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4227 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4238 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4289: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4278 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4289 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4355: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4344 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4355 | auto/user | =============================================== Warning: ../../bsc-compile/mkRasterizer.v:4396: Case statement is not a parallel case. (ELAB-910) Statistics for case statements in always block at line 4385 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 4396 | auto/user | =============================================== Statistics for case statements in always block at line 8277 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8287 | auto/no | =============================================== Statistics for case statements in always block at line 8307 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8317 | auto/no | =============================================== Statistics for case statements in always block at line 8337 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8347 | auto/no | =============================================== Statistics for case statements in always block at line 8367 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8377 | auto/no | =============================================== Statistics for case statements in always block at line 8397 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8407 | auto/no | =============================================== Statistics for case statements in always block at line 8427 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8432 | auto/no | =============================================== Statistics for case statements in always block at line 8445 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8451 | auto/no | =============================================== Statistics for case statements in always block at line 8468 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8473 | auto/no | =============================================== Statistics for case statements in always block at line 8486 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8492 | auto/no | =============================================== Statistics for case statements in always block at line 8509 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8514 | auto/no | =============================================== Statistics for case statements in always block at line 8531 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8537 | auto/no | =============================================== Statistics for case statements in always block at line 8558 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8563 | auto/no | =============================================== Statistics for case statements in always block at line 8580 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8586 | auto/no | =============================================== Statistics for case statements in always block at line 8607 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8614 | auto/no | =============================================== Statistics for case statements in always block at line 8645 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8652 | auto/no | =============================================== Statistics for case statements in always block at line 8683 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8690 | auto/no | =============================================== Statistics for case statements in always block at line 8725 in file '../../bsc-compile/mkRasterizer.v' =============================================== | Line | full/ parallel | =============================================== | 8732 | auto/no | =============================================== Inferred memory devices in process in routine mkRasterizer line 8770 in file '../../bsc-compile/mkRasterizer.v'. ============================================================================================================ | Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | ============================================================================================================ | setupStage_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_trial_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | rcprClipWDivider_dividend_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip2Divider_signResult_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip2Divider_dividend_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip0Divider_q_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | dataRouter_curReceiveQ_reg | Flip-flop | 3 | Y | N | N | N | N | N | N | | xStart_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | clip2Divider_bt_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip0Divider_quotientReady_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_stage_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_r_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_dividend_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip2Divider_q_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip0Divider_trial_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_quotientReady_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | clip0Divider_stage_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | clip0Divider_bt_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | rcprClipWDivider_r_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip1Divider_r_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | yEnd_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | clip1Divider_dividend_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip1Divider_quotientReady_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | clip0Divider_signResult_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_signResult_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip2Divider_trial_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip1Divider_signResult_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | sequenceNum_reg | Flip-flop | 32 | N | N | N | N | N | N | N | | clip2Divider_stage_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | clip1Divider_trial_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip0Divider_r_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | xEnd_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | clip1Divider_stage_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | assemblyVtx0_reg | Flip-flop | 448 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_bt_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | stage_reg | Flip-flop | 3 | Y | N | N | N | N | N | N | | clip1Divider_bt_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | currentY_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | vertexMatrixDeterminantDivider_q_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | rcprClipWDivider_signResult_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | assemblyVtx1_reg | Flip-flop | 448 | Y | N | N | N | N | N | N | | currentX_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | | assemblyStage_reg | Flip-flop | 2 | Y | N | N | N | N | N | N | | clip0Divider_dividend_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | rcprClipWDivider_quotientReady_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | rcprClipWDivider_trial_reg | Flip-flop | 63 | Y | N | N | N | N | N | N | | rcprClipWDivider_trial_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | rcprClipWDivider_q_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip1Divider_q_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | rcprClipWDivider_bt_reg | Flip-flop | 63 | Y | N | N | N | N | N | N | | rcprClipWDivider_bt_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | currentTSD_reg | Flip-flop | 1152 | Y | N | N | N | N | N | N | | clip2Divider_r_reg | Flip-flop | 64 | Y | N | N | N | N | N | N | | clip2Divider_quotientReady_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | rcprClipWDivider_stage_reg | Flip-flop | 32 | Y | N | N | N | N | N | N | ============================================================================================================ Information: Complex logic will not be considered for set/reset inference. (ELAB-2008) Presto compilation completed successfully. Elaborated 1 design. Current design is now 'mkRasterizer'. Information: Building the design 'SizedFIFO' instantiated from design 'mkRasterizer' with the parameters "p1width=454,p2depth=3,p3cntr_width=1,guarded=1". (HDL-193) Inferred memory devices in process in routine SizedFIFO_p1width454_p2depth3_p3cntr_width1_guarded1 line 80 in file '/mit/6.375/tools/bluespec/new/lib/Verilog/SizedFIFO.v'. =============================================================================== | Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | =============================================================================== | D_OUT_reg | Flip-flop | 454 | Y | N | N | N | N | N | N | | head_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | hasodata_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | arr_reg | Flip-flop | 908 | N | N | N | N | N | N | N | | tail_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | ring_empty_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | not_ring_full_reg | Flip-flop | 1 | N | N | N | N | N | N | N | =============================================================================== Statistics for MUX_OPs =================================================================================================== | block name/line | Inputs | Outputs | # sel inputs | MB | =================================================================================================== | SizedFIFO_p1width454_p2depth3_p3cntr_width1_guarded1/101 | 2 | 454 | 1 | N | =================================================================================================== Presto compilation completed successfully. Information: Building the design 'SizedFIFO' instantiated from design 'mkRasterizer' with the parameters "p1width=32'h00000502,p2depth=3,p3cntr_width=1,guarded=1". (HDL-193) Inferred memory devices in process in routine SizedFIFO_p1width00000502_p2depth3_p3cntr_width1_guarded1 line 80 in file '/mit/6.375/tools/bluespec/new/lib/Verilog/SizedFIFO.v'. =============================================================================== | Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | =============================================================================== | D_OUT_reg | Flip-flop | 1282 | Y | N | N | N | N | N | N | | head_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | hasodata_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | arr_reg | Flip-flop | 2564 | N | N | N | N | N | N | N | | tail_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | ring_empty_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | not_ring_full_reg | Flip-flop | 1 | N | N | N | N | N | N | N | =============================================================================== Statistics for MUX_OPs ======================================================================================================== | block name/line | Inputs | Outputs | # sel inputs | MB | ======================================================================================================== | SizedFIFO_p1width00000502_p2depth3_p3cntr_width1_guarded1/101 | 2 | 1282 | 1 | N | ======================================================================================================== Presto compilation completed successfully. Information: Building the design 'SizedFIFO' instantiated from design 'mkRasterizer' with the parameters "p1width=32'h00000540,p2depth=3,p3cntr_width=1,guarded=1". (HDL-193) Inferred memory devices in process in routine SizedFIFO_p1width00000540_p2depth3_p3cntr_width1_guarded1 line 80 in file '/mit/6.375/tools/bluespec/new/lib/Verilog/SizedFIFO.v'. =============================================================================== | Register Name | Type | Width | Bus | MB | AR | AS | SR | SS | ST | =============================================================================== | D_OUT_reg | Flip-flop | 1344 | Y | N | N | N | N | N | N | | head_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | hasodata_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | arr_reg | Flip-flop | 2688 | N | N | N | N | N | N | N | | tail_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | ring_empty_reg | Flip-flop | 1 | N | N | N | N | N | N | N | | not_ring_full_reg | Flip-flop | 1 | N | N | N | N | N | N | N | =============================================================================== Statistics for MUX_OPs ======================================================================================================== | block name/line | Inputs | Outputs | # sel inputs | MB | ======================================================================================================== | SizedFIFO_p1width00000540_p2depth3_p3cntr_width1_guarded1/101 | 2 | 1344 | 1 | N | ======================================================================================================== Presto compilation completed successfully. 1 # This command will check your design for any errors check_design > synth_check_design.rpt # We use set_dont_touch to prevent dc from optimizing some blocks if {${DONT_TOUCH} != ""} { set_dont_touch ${DONT_TOUCH} } Error: Value for list 'object_list' must have 1 elements. (CMD-036) 0 # We now load in the constraints file source synth.sdc 1 # This actually does the synthesis. The map_effort and area_effort are # how much time the synthesizer should spend optimizing your design to # gates. Setting them to high means synthesis will take longer but will # probably produce better results. The boundary_optimization means that # the synthesizer is free to invert ports if it will increase performance. # compile -map_effort medium -area_effort medium -boundary_optimization # compile -map_effort low -area_effort low -boundary_optimization compile -map_effort none -area_effort none -boundary_optimization Information: Data-path optimization is enabled. (DP-1) Information: Checking out the license 'DesignWare'. (SEC-104) Information: Evaluating DesignWare library utilization. (UISN-27) ============================================================================ | DesignWare Building Block Library | Version | Available | ============================================================================ | Basic DW Building Blocks | X-2005.09-DWBB_0512 | * | | Licensed DW Building Blocks | X-2005.09-DWBB_0512 | * | ============================================================================ Information: There are 2247 potential problems in your design. Please run 'check_design' for more information. (LINT-99) Beginning Pass 1 Mapping ------------------------ Processing 'SizedFIFO_p1width00000540_p2depth3_p3cntr_width1_guarded1' Processing 'SizedFIFO_p1width00000502_p2depth3_p3cntr_width1_guarded1' Processing 'SizedFIFO_p1width454_p2depth3_p3cntr_width1_guarded1_0' Processing 'mkRasterizer' Information: The register 'clip0Divider_dividend_reg[0]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[1]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[3]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[5]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[7]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[9]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[11]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[13]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[15]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[17]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[19]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[21]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[23]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[25]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[27]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[29]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[31]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[32]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[33]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[34]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[35]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[36]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[37]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[38]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[39]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[40]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[41]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[42]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[43]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[44]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[45]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[46]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[47]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[48]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[49]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[50]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[51]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[52]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[53]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[54]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[55]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[56]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[57]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[58]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[59]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[60]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[61]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[62]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_dividend_reg[63]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[0]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[1]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[3]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[5]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[7]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[9]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[11]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[13]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[15]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[17]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[19]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[21]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[23]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[25]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[27]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[29]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[31]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[32]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[33]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[34]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[35]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[36]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[37]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[38]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[39]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[40]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[41]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[42]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[43]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[44]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[45]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[46]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[47]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[48]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[49]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[50]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[51]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[52]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[53]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[54]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[55]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[56]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[57]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[58]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[59]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[60]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[61]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[62]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_dividend_reg[63]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[0]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[1]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[3]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[5]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[7]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[9]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[11]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[13]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[15]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[17]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[19]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[21]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[23]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[25]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[27]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[29]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[31]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[32]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[33]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[34]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[35]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[36]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[37]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[38]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[39]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[40]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[41]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[42]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[43]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[44]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[45]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[46]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[47]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[48]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[49]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[50]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[51]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[52]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[53]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[54]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[55]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[56]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[57]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[58]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[59]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[60]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[61]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[62]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_dividend_reg[63]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[0]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[1]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[3]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[5]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[7]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[9]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[11]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[13]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[15]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[17]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[19]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[21]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[23]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[25]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[27]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[29]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[31]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[32]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[33]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[34]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[35]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[36]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[37]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[38]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[39]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[40]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[41]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[42]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[43]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[44]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[45]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[46]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[47]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[48]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[49]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[50]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[51]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[52]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[53]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[54]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[55]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[56]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[57]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[58]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[59]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[60]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[61]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[62]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_dividend_reg[63]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'vertexMatrixDeterminantDivider_stage_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip2Divider_stage_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip1Divider_stage_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'clip0Divider_stage_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_stage_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[0]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[1]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[2]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[3]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[4]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[5]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[6]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[7]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[8]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[9]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[10]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[11]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[12]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[13]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[14]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[15]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[16]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[17]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[18]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[19]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[20]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[21]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[22]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[23]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[24]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[25]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[26]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[27]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[28]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[29]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[30]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[31]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[32]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[33]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[34]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[35]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[36]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[37]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[38]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[39]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[40]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[41]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[42]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[43]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[44]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[45]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[46]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[47]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[48]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[49]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[50]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[51]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[52]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[53]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[54]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[55]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[56]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[57]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[58]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[59]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[60]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[61]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[62]' is a constant and will be removed. (OPT-1206) Information: The register 'rcprClipWDivider_dividend_reg[63]' is a constant and will be removed. (OPT-1206) Updating timing information Information: Updating design information... (UID-85) Beginning Implementation Selection ---------------------------------- Mapping 'mkRasterizer_DW_cmp_0' Mapping 'mkRasterizer_DW_cmp_1' Mapping 'mkRasterizer_DW_cmp_2' Mapping 'mkRasterizer_DW_cmp_3' Processing 'mkRasterizer_DW01_sub_0' Mapping 'mkRasterizer_DW_cmp_4' Processing 'mkRasterizer_DW01_sub_1' Mapping 'mkRasterizer_DW_cmp_5' Mapping 'mkRasterizer_DW_cmp_6' Mapping 'mkRasterizer_DW_cmp_7' Mapping 'mkRasterizer_DW_cmp_8' Mapping 'mkRasterizer_DW_cmp_9' Mapping 'mkRasterizer_DW_cmp_10' Mapping 'mkRasterizer_DW_cmp_11' Mapping 'mkRasterizer_DW_cmp_12' Mapping 'mkRasterizer_DW_cmp_13' Mapping 'mkRasterizer_DW_cmp_14' Mapping 'mkRasterizer_DW_cmp_15' Mapping 'mkRasterizer_DW_cmp_16' Mapping 'mkRasterizer_DW_cmp_17' Mapping 'mkRasterizer_DW_cmp_18' Mapping 'mkRasterizer_DW_cmp_19' Mapping 'mkRasterizer_DW_cmp_20' Mapping 'mkRasterizer_DW_cmp_21' Mapping 'mkRasterizer_DW_cmp_22' Mapping 'mkRasterizer_DW_cmp_23' Mapping 'DW_cmp' Information: Added key list '( *SynLib-Eval or DesignWare )' to design 'mkRasterizer'. (DDB-72) Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'DW_cmp' Mapping 'mkRasterizer_DW_cmp_24' Mapping 'mkRasterizer_DW_cmp_25' Mapping 'mkRasterizer_DW_cmp_26' Mapping 'mkRasterizer_DW_cmp_27' Mapping 'mkRasterizer_DW_cmp_28' Mapping 'mkRasterizer_DW_cmp_29' Mapping 'mkRasterizer_DW_cmp_30' Mapping 'mkRasterizer_DW_cmp_31' Mapping 'mkRasterizer_DW_cmp_32' Mapping 'mkRasterizer_DW_cmp_33' Mapping 'mkRasterizer_DW_cmp_34' Mapping 'mkRasterizer_DW_cmp_35' Mapping 'mkRasterizer_DW_cmp_36' Mapping 'mkRasterizer_DW_cmp_37' Mapping 'mkRasterizer_DW_cmp_38' Mapping 'mkRasterizer_DW_cmp_39' Mapping 'mkRasterizer_DW_cmp_40' Processing 'mkRasterizer_DW01_inc_0' Mapping 'mkRasterizer_DW_cmp_41' Mapping 'mkRasterizer_DW_cmp_42' Mapping 'mkRasterizer_DW_cmp_43' Processing 'mkRasterizer_DW01_sub_2' Processing 'mkRasterizer_DW01_add_0' Processing 'mkRasterizer_DW01_sub_3' Processing 'mkRasterizer_DW01_add_1' Processing 'mkRasterizer_DW01_add_2' Processing 'mkRasterizer_DW01_add_3' Mapping 'mkRasterizer_DW_cmp_44' Processing 'mkRasterizer_DW01_sub_4' Mapping 'mkRasterizer_DW_cmp_45' Processing 'mkRasterizer_DW01_sub_5' Processing 'mkRasterizer_DW01_add_4' Processing 'mkRasterizer_DW01_sub_6' Mapping 'mkRasterizer_DW_cmp_46' Processing 'mkRasterizer_DW01_sub_7' Processing 'mkRasterizer_DW01_add_5' Processing 'mkRasterizer_DW01_sub_8' Mapping 'mkRasterizer_DW_cmp_47' Processing 'mkRasterizer_DW01_sub_9' Processing 'mkRasterizer_DW01_add_6' Mapping 'mkRasterizer_DW_cmp_48' Mapping 'mkRasterizer_DW_cmp_49' Mapping 'mkRasterizer_DW_cmp_50' Mapping 'mkRasterizer_DW_cmp_51' Mapping 'mkRasterizer_DW_cmp_52' Beginning Mapping Optimizations (Ultra Medium effort) ------------------------------- ELAPSED WORST NEG TOTAL NEG DESIGN TIME AREA SLACK SLACK RULE COST ENDPOINT --------- --------- --------- --------- --------- ------------------------- 0:19:56 1698294.4 17680.82 76546088.0 801553.8 0:19:56 1698294.4 17680.82 76546088.0 801553.8 Beginning Delay Optimization Phase ---------------------------------- ELAPSED WORST NEG TOTAL NEG DESIGN TIME AREA SLACK SLACK RULE COST ENDPOINT --------- --------- --------- --------- --------- ------------------------- 0:21:02 1721923.1 0.00 0.0 0.4 Beginning Design Rule Fixing (max_capacitance) ---------------------------- ELAPSED WORST NEG TOTAL NEG DESIGN TIME AREA SLACK SLACK RULE COST ENDPOINT --------- --------- --------- --------- --------- ------------------------- 0:23:49 1721795.0 0.00 0.0 0.4 0:24:08 1721676.2 0.00 0.0 0.0 Optimization Complete --------------------- Warning: Design 'mkRasterizer' contains 1 high-fanout nets. A fanout number of 1000 will be used for delay calculations involving these nets. (TIM-134) Net 'CLK': 24039 load(s), 1 driver(s) 1 # We write out the results as a verilog netlist and in ddc format write -format verilog -hierarchy -output synthesized.v Writing verilog file '/afs/athena.mit.edu/user/j/i/jiawen/6.375/omgpu375/branches/jiawen_synth/build/Rasterizer/dc-synth/build-2007-05-15_17-23/synthesized.v'. Warning: Verilog 'assign' or 'tran' statements are written out. (VO-4) Warning: Verilog writer has added 2459 nets to module mkRasterizer using SYNOPSYS_UNCONNECTED_ as prefix. Please use the change_names command to make the correct changes before invoking the verilog writer. (VO-11) 1 write -format ddc -hierarchy -output synthesized.ddc Writing ddc file 'synthesized.ddc'. 1 # We create a timing report for the worst case timing path # and an area report for each reference in the heirachy report_timing -capacitance -transition_time -nosplit -nworst 10 -max_paths 500 > synth_timing.rpt report_reference -nosplit > synth_area.rpt report_resources -nosplit > synth_resources.rpt set cells [get_cells -hierarchical -filter "is_hierarchical == true"] {dataRouter_receiveEastQ dataRouter_receiveNorthQ dataRouter_receiveSelfQ dataRouter_receiveSouthQ dataRouter_receiveWestQ dataRouter_sendEastQ dataRouter_sendNorthQ dataRouter_sendSelfQ dataRouter_sendSouthQ dataRouter_sendWestQ setupQ triangleQ lt_8652 lt_8614 mult_6454 mult_6450 mult_6446 mult_6442 mult_6438 mult_6434 mult_6430 mult_6426 mult_6422 mult_6418 mult_6414 sub_3353 sub_3309 r1913 r1911 r1909 lt_7175 r1907 lt_7170 mult_7200_DP_OP_260_472_126 mult_7196_DP_OP_261_472_125 mult_7192_DP_OP_264_472_124 mult_7188_DP_OP_267_472_123 mult_7184_DP_OP_268_472_122 mult_7180_DP_OP_269_472_121 mult_6918_DP_OP_276_4014_120 mult_6886_DP_OP_275_4014_119 mult_6797_DP_OP_271_4014_118 mult_6775_DP_OP_270_4014_117 mult_6698_DP_OP_284_4014_116 mult_6647_DP_OP_283_4014_115 mult_6263_DP_OP_293_1556_114 mult_6247_DP_OP_292_1095_113 mult_6231_DP_OP_291_1095_112 mult_6225_DP_OP_290_1095_111 mult_6209_DP_OP_289_1095_110 mult_6193_DP_OP_288_1095_109 mult_6177_DP_OP_287_1095_108 mult_6161_DP_OP_286_1095_107 mult_6145_DP_OP_285_1095_106 mult_6129_DP_OP_294_1556_105 mult_6113_DP_OP_295_1556_104 mult_6097_DP_OP_296_1556_103 mult_6382_DP_OP_297_1508_102 mult_6375_DP_OP_298_1508_101 mult_5616_DP_OP_251_2506_100 mult_5613_DP_OP_250_2506_99 mult_5610_DP_OP_249_2506_98 mult_5607_DP_OP_248_2506_97 mult_5604_DP_OP_247_2506_96 mult_5601_DP_OP_246_2506_95 mult_5598_DP_OP_245_2506_94 mult_5595_DP_OP_244_2506_93 mult_6045_DP_OP_265_9510_92 mult_6638_DP_OP_281_9791_91 mult_6641_DP_OP_282_9791_90 mult_5448_DP_OP_259_2506_89 mult_5533_DP_OP_243_2506_88 mult_5438_DP_OP_258_2506_87 mult_5530_DP_OP_242_2506_86 mult_5435_DP_OP_257_2506_85 mult_5517_DP_OP_241_2506_84 mult_5425_DP_OP_256_2506_83 mult_5514_DP_OP_240_2506_82 mult_5422_DP_OP_255_2506_81 mult_5501_DP_OP_239_2506_80 mult_5412_DP_OP_254_2506_79 mult_5498_DP_OP_238_2506_78 mult_5409_DP_OP_253_2506_77 mult_5485_DP_OP_237_2506_76 mult_5399_DP_OP_252_2506_75 mult_5983_DP_OP_266_9510_74 mult_6587_DP_OP_279_9791_73 mult_6590_DP_OP_280_9791_72 mult_5482_DP_OP_236_2506_71 mult_6017_DP_OP_263_9510_70 mult_6584_DP_OP_278_9791_69 mult_6581_DP_OP_277_9791_68 mult_6695_DP_OP_262_8496_67 mult_6847_DP_OP_273_7109_66 mult_6880_DP_OP_274_7109_65 mult_6850_DP_OP_272_7109_64 lte_8011 lte_7653 lt_7567 lte_7515 ...} set zcells [sort_collection $cells { full_name }] {add_3241 add_3259 add_3277 add_3290 add_3292 add_3300 add_3344 add_3969 dataRouter_receiveEastQ dataRouter_receiveNorthQ dataRouter_receiveSelfQ dataRouter_receiveSouthQ dataRouter_receiveWestQ dataRouter_sendEastQ dataRouter_sendNorthQ dataRouter_sendSelfQ dataRouter_sendSouthQ dataRouter_sendWestQ lt_7170 lt_7175 lt_7561 lt_7567 lt_8614 lt_8652 lte_7468 lte_7497 lte_7515 lte_7653 lte_8011 mult_5399_DP_OP_252_2506_75 mult_5409_DP_OP_253_2506_77 mult_5412_DP_OP_254_2506_79 mult_5422_DP_OP_255_2506_81 mult_5425_DP_OP_256_2506_83 mult_5435_DP_OP_257_2506_85 mult_5438_DP_OP_258_2506_87 mult_5448_DP_OP_259_2506_89 mult_5482_DP_OP_236_2506_71 mult_5485_DP_OP_237_2506_76 mult_5498_DP_OP_238_2506_78 mult_5501_DP_OP_239_2506_80 mult_5514_DP_OP_240_2506_82 mult_5517_DP_OP_241_2506_84 mult_5530_DP_OP_242_2506_86 mult_5533_DP_OP_243_2506_88 mult_5595_DP_OP_244_2506_93 mult_5598_DP_OP_245_2506_94 mult_5601_DP_OP_246_2506_95 mult_5604_DP_OP_247_2506_96 mult_5607_DP_OP_248_2506_97 mult_5610_DP_OP_249_2506_98 mult_5613_DP_OP_250_2506_99 mult_5616_DP_OP_251_2506_100 mult_5983_DP_OP_266_9510_74 mult_6017_DP_OP_263_9510_70 mult_6045_DP_OP_265_9510_92 mult_6097_DP_OP_296_1556_103 mult_6113_DP_OP_295_1556_104 mult_6129_DP_OP_294_1556_105 mult_6145_DP_OP_285_1095_106 mult_6161_DP_OP_286_1095_107 mult_6177_DP_OP_287_1095_108 mult_6193_DP_OP_288_1095_109 mult_6209_DP_OP_289_1095_110 mult_6225_DP_OP_290_1095_111 mult_6231_DP_OP_291_1095_112 mult_6247_DP_OP_292_1095_113 mult_6263_DP_OP_293_1556_114 mult_6375_DP_OP_298_1508_101 mult_6382_DP_OP_297_1508_102 mult_6414 mult_6418 mult_6422 mult_6426 mult_6430 mult_6434 mult_6438 mult_6442 mult_6446 mult_6450 mult_6454 mult_6581_DP_OP_277_9791_68 mult_6584_DP_OP_278_9791_69 mult_6587_DP_OP_279_9791_73 mult_6590_DP_OP_280_9791_72 mult_6638_DP_OP_281_9791_91 mult_6641_DP_OP_282_9791_90 mult_6647_DP_OP_283_4014_115 mult_6695_DP_OP_262_8496_67 mult_6698_DP_OP_284_4014_116 mult_6775_DP_OP_270_4014_117 mult_6797_DP_OP_271_4014_118 mult_6847_DP_OP_273_7109_66 mult_6850_DP_OP_272_7109_64 mult_6880_DP_OP_274_7109_65 mult_6886_DP_OP_275_4014_119 mult_6918_DP_OP_276_4014_120 mult_7180_DP_OP_269_472_121 mult_7184_DP_OP_268_472_122 mult_7188_DP_OP_267_472_123 ...} foreach_in_collection eachcell $zcells { current_instance $eachcell report_reference -nosplit >> synth_area.rpt report_resources -nosplit >> synth_resources.rpt } Current instance is '/mkRasterizer/add_3241'. Current instance is '/mkRasterizer/add_3259'. Current instance is '/mkRasterizer/add_3277'. Current instance is '/mkRasterizer/add_3290'. Current instance is '/mkRasterizer/add_3292'. Current instance is '/mkRasterizer/add_3300'. Current instance is '/mkRasterizer/add_3344'. Current instance is '/mkRasterizer/add_3969'. Current instance is '/mkRasterizer/dataRouter_receiveEastQ'. Current instance is '/mkRasterizer/dataRouter_receiveNorthQ'. Current instance is '/mkRasterizer/dataRouter_receiveSelfQ'. Current instance is '/mkRasterizer/dataRouter_receiveSouthQ'. Current instance is '/mkRasterizer/dataRouter_receiveWestQ'. Current instance is '/mkRasterizer/dataRouter_sendEastQ'. Current instance is '/mkRasterizer/dataRouter_sendNorthQ'. Current instance is '/mkRasterizer/dataRouter_sendSelfQ'. Current instance is '/mkRasterizer/dataRouter_sendSouthQ'. Current instance is '/mkRasterizer/dataRouter_sendWestQ'. Current instance is '/mkRasterizer/lt_7170'. Current instance is '/mkRasterizer/lt_7175'. Current instance is '/mkRasterizer/lt_7561'. Current instance is '/mkRasterizer/lt_7567'. Current instance is '/mkRasterizer/lt_8614'. Current instance is '/mkRasterizer/lt_8652'. Current instance is '/mkRasterizer/lte_7468'. Current instance is '/mkRasterizer/lte_7497'. Current instance is '/mkRasterizer/lte_7515'. Current instance is '/mkRasterizer/lte_7653'. Current instance is '/mkRasterizer/lte_8011'. Current instance is '/mkRasterizer/mult_5399_DP_OP_252_2506_75'. Current instance is '/mkRasterizer/mult_5409_DP_OP_253_2506_77'. Current instance is '/mkRasterizer/mult_5412_DP_OP_254_2506_79'. Current instance is '/mkRasterizer/mult_5422_DP_OP_255_2506_81'. Current instance is '/mkRasterizer/mult_5425_DP_OP_256_2506_83'. Current instance is '/mkRasterizer/mult_5435_DP_OP_257_2506_85'. Current instance is '/mkRasterizer/mult_5438_DP_OP_258_2506_87'. Current instance is '/mkRasterizer/mult_5448_DP_OP_259_2506_89'. Current instance is '/mkRasterizer/mult_5482_DP_OP_236_2506_71'. Current instance is '/mkRasterizer/mult_5485_DP_OP_237_2506_76'. Current instance is '/mkRasterizer/mult_5498_DP_OP_238_2506_78'. Current instance is '/mkRasterizer/mult_5501_DP_OP_239_2506_80'. Current instance is '/mkRasterizer/mult_5514_DP_OP_240_2506_82'. Current instance is '/mkRasterizer/mult_5517_DP_OP_241_2506_84'. Current instance is '/mkRasterizer/mult_5530_DP_OP_242_2506_86'. Current instance is '/mkRasterizer/mult_5533_DP_OP_243_2506_88'. Current instance is '/mkRasterizer/mult_5595_DP_OP_244_2506_93'. Current instance is '/mkRasterizer/mult_5598_DP_OP_245_2506_94'. Current instance is '/mkRasterizer/mult_5601_DP_OP_246_2506_95'. Current instance is '/mkRasterizer/mult_5604_DP_OP_247_2506_96'. Current instance is '/mkRasterizer/mult_5607_DP_OP_248_2506_97'. Current instance is '/mkRasterizer/mult_5610_DP_OP_249_2506_98'. Current instance is '/mkRasterizer/mult_5613_DP_OP_250_2506_99'. Current instance is '/mkRasterizer/mult_5616_DP_OP_251_2506_100'. Current instance is '/mkRasterizer/mult_5983_DP_OP_266_9510_74'. Current instance is '/mkRasterizer/mult_6017_DP_OP_263_9510_70'. Current instance is '/mkRasterizer/mult_6045_DP_OP_265_9510_92'. Current instance is '/mkRasterizer/mult_6097_DP_OP_296_1556_103'. Current instance is '/mkRasterizer/mult_6113_DP_OP_295_1556_104'. Current instance is '/mkRasterizer/mult_6129_DP_OP_294_1556_105'. Current instance is '/mkRasterizer/mult_6145_DP_OP_285_1095_106'. Current instance is '/mkRasterizer/mult_6161_DP_OP_286_1095_107'. Current instance is '/mkRasterizer/mult_6177_DP_OP_287_1095_108'. Current instance is '/mkRasterizer/mult_6193_DP_OP_288_1095_109'. Current instance is '/mkRasterizer/mult_6209_DP_OP_289_1095_110'. Current instance is '/mkRasterizer/mult_6225_DP_OP_290_1095_111'. Current instance is '/mkRasterizer/mult_6231_DP_OP_291_1095_112'. Current instance is '/mkRasterizer/mult_6247_DP_OP_292_1095_113'. Current instance is '/mkRasterizer/mult_6263_DP_OP_293_1556_114'. Current instance is '/mkRasterizer/mult_6375_DP_OP_298_1508_101'. Current instance is '/mkRasterizer/mult_6382_DP_OP_297_1508_102'. Current instance is '/mkRasterizer/mult_6414'. Current instance is '/mkRasterizer/mult_6418'. Current instance is '/mkRasterizer/mult_6422'. Current instance is '/mkRasterizer/mult_6426'. Current instance is '/mkRasterizer/mult_6430'. Current instance is '/mkRasterizer/mult_6434'. Current instance is '/mkRasterizer/mult_6438'. Current instance is '/mkRasterizer/mult_6442'. Current instance is '/mkRasterizer/mult_6446'. Current instance is '/mkRasterizer/mult_6450'. Current instance is '/mkRasterizer/mult_6454'. Current instance is '/mkRasterizer/mult_6581_DP_OP_277_9791_68'. Current instance is '/mkRasterizer/mult_6584_DP_OP_278_9791_69'. Current instance is '/mkRasterizer/mult_6587_DP_OP_279_9791_73'. Current instance is '/mkRasterizer/mult_6590_DP_OP_280_9791_72'. Current instance is '/mkRasterizer/mult_6638_DP_OP_281_9791_91'. Current instance is '/mkRasterizer/mult_6641_DP_OP_282_9791_90'. Current instance is '/mkRasterizer/mult_6647_DP_OP_283_4014_115'. Current instance is '/mkRasterizer/mult_6695_DP_OP_262_8496_67'. Current instance is '/mkRasterizer/mult_6698_DP_OP_284_4014_116'. Current instance is '/mkRasterizer/mult_6775_DP_OP_270_4014_117'. Current instance is '/mkRasterizer/mult_6797_DP_OP_271_4014_118'. Current instance is '/mkRasterizer/mult_6847_DP_OP_273_7109_66'. Current instance is '/mkRasterizer/mult_6850_DP_OP_272_7109_64'. Current instance is '/mkRasterizer/mult_6880_DP_OP_274_7109_65'. Current instance is '/mkRasterizer/mult_6886_DP_OP_275_4014_119'. Current instance is '/mkRasterizer/mult_6918_DP_OP_276_4014_120'. Current instance is '/mkRasterizer/mult_7180_DP_OP_269_472_121'. Current instance is '/mkRasterizer/mult_7184_DP_OP_268_472_122'. Current instance is '/mkRasterizer/mult_7188_DP_OP_267_472_123'. Current instance is '/mkRasterizer/mult_7192_DP_OP_264_472_124'. Current instance is '/mkRasterizer/mult_7196_DP_OP_261_472_125'. Current instance is '/mkRasterizer/mult_7200_DP_OP_260_472_126'. Current instance is '/mkRasterizer/mult_7466'. Current instance is '/mkRasterizer/mult_7495'. Current instance is '/mkRasterizer/mult_7513'. Current instance is '/mkRasterizer/mult_7649'. Current instance is '/mkRasterizer/r1903'. Current instance is '/mkRasterizer/r1907'. Current instance is '/mkRasterizer/r1909'. Current instance is '/mkRasterizer/r1911'. Current instance is '/mkRasterizer/r1913'. Current instance is '/mkRasterizer/setupQ'. Current instance is '/mkRasterizer/sub_3243'. Current instance is '/mkRasterizer/sub_3250'. Current instance is '/mkRasterizer/sub_3261'. Current instance is '/mkRasterizer/sub_3268'. Current instance is '/mkRasterizer/sub_3279'. Current instance is '/mkRasterizer/sub_3283'. Current instance is '/mkRasterizer/sub_3302'. Current instance is '/mkRasterizer/sub_3309'. Current instance is '/mkRasterizer/sub_3347'. Current instance is '/mkRasterizer/sub_3353'. Current instance is '/mkRasterizer/triangleQ'. exit Information: Defining new variable 'compile_prune_synlib_cache'. (CMD-041) Information: Defining new variable 'VERILOG_SRCS'. (CMD-041) Information: Defining new variable 'DONT_TOUCH'. (CMD-041) Information: Defining new variable 'VERILOG_TOPLEVEL'. (CMD-041) Information: Defining new variable 'SEARCH_PATH'. (CMD-041) Information: Defining new variable 'SYMBOL_SDBS'. (CMD-041) Information: Defining new variable 'TARGET_DBS'. (CMD-041) Information: Defining new variable 'cells'. (CMD-041) Information: Defining new variable 'zcells'. (CMD-041) Information: Defining new variable 'eachcell'. (CMD-041) Information: Defining new variable 'LINK_DBS'. (CMD-041) Thank you...