Base (4mcycle):

vcs-sim-rtl/median.smips.out: ipc                   = 0.280437
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.325186
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.299966
vcs-sim-rtl/towers.smips.out: ipc                   = 0.245221
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.277348


Initial pipeline (mkProc.bsv 1.7):

   //-----------------------------------------------------------
   // State

   // Standard processor state
   
   Reg#(Addr)  pc    <- mkReg(32'h00001000);
   FIFO#(Addr) pcQ   <- mkFIFO();
   Reg#(Stage) stage <- mkReg(PCgen);
   RFile       rf    <- mkRFile;
   SFIFO#(WBResult, Rindx)  wbQ <- mkSFIFO(findf);

   // Coprocessor state
   
   Reg#(Bit#(8)) cp0_tohost   <- mkReg(0);
   Reg#(Bit#(8)) cp0_fromhost <- mkReg(0);
   Reg#(Bool)    cp0_statsEn  <- mkReg(False);

   // Memory request/response state

   Reg#(Bit#(8))   epoch       <- mkReg(8'h0);
   
   FIFO#(InstReq)  instReqQ    <- mkBFIFO1();
   FIFO#(InstResp) instRespQ   <- mkFIFO();

   FIFO#(DataReq)  dataReqQ    <- mkBFIFO1();
   FIFO#(DataResp) dataRespQ   <- mkFIFO();

   // Statistics state

   Reg#(Int#(25))  num_cycles  <- mkReg(25'h0);
   Reg#(Int#(25))  num_inst    <- mkReg(25'h0);

vcs-sim-rtl/median.smips.out: ipc                   = 0.456051
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.434464
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.475029
vcs-sim-rtl/towers.smips.out: ipc                   = 0.481102
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.474779


2x Response BFIFO1's (mkProc.bsv 1.8):

   FIFO#(InstReq)  instReqQ    <- mkBFIFO1();
   FIFO#(InstResp) instRespQ   <- mkBFIFO1();

   FIFO#(DataReq)  dataReqQ    <- mkBFIFO1();
   FIFO#(DataResp) dataRespQ   <- mkBFIFO1();

vcs-sim-rtl/median.smips.out: ipc                   = 0.519513
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.498988
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.507330
vcs-sim-rtl/towers.smips.out: ipc                   = 0.502844
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.498428


2x Response BFIFO1's + pcQ BFIFO1:

vcs-sim-rtl/median.smips.out: ipc                   = 0.499076
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.492026
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.499632
vcs-sim-rtl/towers.smips.out: ipc                   = 0.499622
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.498016


Only instRespQ BFIFO1:

vcs-sim-rtl/median.smips.out: ipc                   = 0.535101
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.496684
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.504619
vcs-sim-rtl/towers.smips.out: ipc                   = 0.502844
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.498428




======================================================================

Initial BHT (4-entry):

vcs-sim-rtl/median.smips.out: ipc                   = 0.555164
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.566079
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.528172
vcs-sim-rtl/towers.smips.out: ipc                   = 0.502844
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.524191


Large BHT (256-entry):

vcs-sim-rtl/median.smips.out: ipc                   = 0.566251
vcs-sim-rtl/multiply.smips.out: ipc                   = 0.567549
vcs-sim-rtl/qsort.smips.out: ipc                   = 0.531182
vcs-sim-rtl/towers.smips.out: ipc                   = 0.501215
vcs-sim-rtl/vvadd.smips.out: ipc                   = 0.524282