/* * Copyright (c) 1982, 1986 Regents of the University of California. * All rights reserved. The Berkeley software License Agreement * specifies the terms and conditions for redistribution. * * derived from: @(#)ubareg.h 7.1 (Berkeley) 6/5/86 */ /* * VAXstar local registers & I/O space including SLU controller. * The VAXstar is a busless machine. * The name nb_regs represents "no bus", i.e., * uba_regs, qb_regs, nb_regs. * * Mapping is split into segments: * nb_regs hltcod -> toyram * nb1_regs disk cntlr -> video option board ROM * nb2_regs Monochrome video RAM * nb3_regs Color Video Option registers and memory * nb4_regs System Scratch RAM * An additional segment is used for the MicroVAX 2000 serial * line expander (8 line SLU). Defined in shreg.h, not here. */ struct nb_regs { u_long nb_hltcod; /* VAXstar halt code register */ u_long nb_mser; /* memory system error register */ u_long nb_mear; /* memory error address register */ u_char nb_int_msk; /* interrupt mask register */ u_char nb_vdc_org; /* monochrome display origin */ u_char nb_vdc_sel; /* video interrupt select register */ u_char nb_int_reqclr; /* intr req (r/o), intr clr (w/o) */ u_long nb_pad1[16380]; u_char nb_narom[128]; /* network address rom ?????? */ u_long nb_pad2[16352]; u_short nb_sercsr; /* serial line controller CSR */ u_short nb_pad3; u_short nb_serrbuf_lpr; /* SLU read bufffer/line parameter */ u_short nb_pad4; union { u_char c[2]; u_short w; } nb_sertcr; u_short nb_pad5; union { u_char c[2]; u_short w; } nb_sermsr_tdr; u_short nb_pad6; u_long nb_pad7[16380]; u_short nb_toysecs; /* seconds */ u_short nb_pad8; u_short nb_toysecs_alarm; /* not used */ u_short nb_pad9; u_short nb_toymins; /* minutes */ u_short nb_pad10; u_short nb_toymins_alarm; /* not used */ u_short nb_pad11; u_short nb_toyhours; /* hours */ u_short nb_pad12; u_short nb_toyhours_alarm; /* not used */ u_short nb_pad13; u_short nb_toyday_week; /* not used */ u_short nb_pad14; u_short nb_toyday; /* day of month */ u_short nb_pad15; u_short nb_toymonth; /* month */ u_short nb_pad16; u_short nb_toyyear; /* year */ u_short nb_pad17; u_short nb_toycsra; /* csr */ u_short nb_pad18; u_short nb_toycsrb; /* csr */ u_short nb_pad19; u_short nb_toycsrc; /* csr */ u_short nb_pad20; u_short nb_toycsrd; /* csr */ u_short nb_pad21; /* NON-VOLATILE RAM */ u_long nb_cpmbx; /* Console program mailbox */ u_long nb_cpflg; /* Console program flags */ u_long nb_lk201_id; /* LK201 keyboard variation */ u_long nb_console_id; /* Console device type */ u_long nb_scr[4]; /* Scratch RAM physical address */ u_long nb_temp[12]; /* Used by System Firmware */ u_long nb_bat_chk[4]; /* Battery check data */ u_long nb_boot_dev[4]; /* Default boot device */ u_long nb_boot_flg[4]; /* Default boot flags */ u_long nb_scr_length; /* # of pages of scratch RAM */ u_long nb_reserved[17]; /* reserved */ u_long nb_pad22[16320]; }; /* * VAXstar NVR bit definitions for * only those fields which are used. * Each byte of NVR occupies bits 2 thru 9 of a longword. */ /* * Console program flags, * actual bit positions (not shifted by the code). */ #define VS_CPF_CRT 0x8 /* Console is CRT (not hardcopy) */ #define VS_CPF_VIDEO 0x80 /* video display (not a terminal) */ /* * Console type ID value, * after shifted right two bits by the code. */ #define VS_CID_UNKNOWN 0x0 /* Console type is unknown */ #define VS_CID_DIAG3 0x1 /* Diagnostic console (SLU line 3) */ #define VS_CID_TERM0 0x2 /* Attached terminal (SLU line 0) */ #define VS_CID_BITMAP 0xb0 /* Base monochrome bitmapped display */ #define VS_CID_COLOR 0xd0 /* Optional dragon color display */ struct nb1_regs { u_char nb_dkc_reg; /* Disk - register data access */ u_char nb_pad23[3]; u_char nb_dkc_cmd_stat; /* Disk - cntlr command & interupt status */ u_char nb_pad24[3]; u_long nb_pad25[30]; /* SCSI controller chip registers */ u_char nb_scs_out_data; /* (wo) Output data register */ #define nb_scs_cur_data nb_scs_out_data /* (ro) Current data register */ u_char nb_pad26[3]; u_char nb_scs_ini_cmd; /* (r/w) Initiator command register */ u_char nb_pad27[3]; u_char nb_scs_mode; /* (r/w) Mode register */ u_char nb_pad28[3]; u_char nb_scs_tar_cmd; /* (r/w) Target command register */ u_char nb_pad29[3]; u_char nb_cur_stat; /* (ro) Current bus status register */ #define nb_scs_sel_ena nb_scs_cur_stat /* (wo) Select enable register */ u_char nb_pad30[3]; u_char nb_scs_status; /* (ro) Bus and status register */ #define nb_scs_dma_send nb_scs_status /* (wo) Start DMA send action */ u_char nb_pad31[3]; u_char nb_scs_in_data; /* (ro) Input data regsiter */ #define nb_scs_data_trcv nb_scs_in_data /* (wo) Start DMA target receive action */ u_char nb_pad32[3]; u_char nb_scs_dma_ircv; /* (wo) Start DMA initiator rcv action */ #define nb_scs_reset nb_scs_dma_ircv /* (ro) Reset interrupt/error action */ u_char nb_pad33[3]; u_char nb_scd_adr; /* (wo) DMA address register */ u_char nb_pad34[3]; u_long nb_pad35[7]; u_short nb_scd_cnt; /* (r/w) DMA byte count register */ u_short nb_pad36; u_char nb_scd_dir; /* (wo) DMA transfer direction */ u_char nb_pad37[3]; u_long nb_pad38[16334]; u_char nb_ddb[16384]; /* Disk cntlr - data buffer RAM */ u_long nb_pad39[12288]; u_short nb_ni_rdp; /* Network cntlr register data port */ u_short nb_pad40; u_short nb_ni_rap; /* Network cntlr register address port */ u_short nb_pad41; u_long nb_pad42[16382]; u_short nb_cur_cmd; /* Cursor command register */ u_short nb_pad43; u_short nb_cur_xpos; /* Cursor X position */ u_short nb_pad44; u_short nb_cur_ypos; /* Cursor Y position */ u_short nb_pad45; u_short nb_cur_xmin_1; /* Region 1 left edge */ u_short nb_pad46; u_short nb_cur_xmax_1; /* Region 1 right edge */ u_short nb_pad47; u_short nb_cur_ymin_1; /* Region 1 top edge */ u_short nb_pad48; u_short nb_cur_ymax_1; /* Region 1 bottom edge */ u_short nb_pad49; u_long nb_pad50[4]; u_short nb_cur_xmin_2; /* Region 2 left edge */ u_short nb_pad51; u_short nb_cur_xmax_2; /* Region 2 right edge */ u_short nb_pad52; u_short nb_cur_ymin_2; /* Region 2 top edge */ u_short nb_pad53; u_short nb_cur_ymax_2; /* Region 2 bottom edge */ u_short nb_pad54; u_short nb_load; /* Cursor sprite pattern load */ u_short nb_pad55; u_long nb_pad56[16368]; u_long nb_ni_rom[32768]; /* Network option board ROM */ u_long nb_pad57[32768]; u_long nb_vo_rom[65536]; /* Video option board ROM */ }; struct nb2_regs { u_long nb_bitmap[32768]; /* Monochrome video RAM */ }; /* struct nb3_regs { u_long nb_co_map[0x8000000]; /* Video option board (color) */ /* }; */ struct nb4_regs { u_long mct_base; /* Phys. addr. of main configuration. table */ u_long option1; /* Phys. addr. of first option's firmware */ u_long option2; /* Phys. addr. of second option's firmware */ u_long good64kb; /* Phys. addr. of good main memory */ u_long bitmap; /* Phys. addr. of memory bitmap */ u_long bitmap_length; /* Length of memory bitmap in bytes */ u_long kb_good; /* Status of LK201 keyboard */ u_long mouse_good; /* Status of pointer device (mouse or tablet) */ u_long init_output; /* Phys. addr. of init routine for console out*/ u_long reset_output; /* Phys. addr.of reset routine for console out*/ u_long init_input; /* Phys. addr. of init routine for console in */ u_long reset_input; /* Phys. addr.of reset routine for console in */ u_long get_char; /* Phys. addr.of "get_char" routine */ u_long put_char; /* Phys. addr.of "put_char" routine */ u_long fbeep; /* Phys. addr.of "beep" routine */ u_long cursor_max_row; /* Max. char. row of console window rect. */ u_long cursor_column; /* Current horizontal pos. */ u_long cursor_row; /* Current vertical pos. */ u_long save_console; /* Phys. addr. of save routine */ u_long restore_console;/* Phys. addr. of restore routine */ u_long st_flags; /* System firmware selftest control word */ u_long st_loop_addr; /* System firmware selftest loop address */ }; /* qb_mser */ #define QBM_CD 0x300 /* memory error code */ #define QBM_NXM 0x80 /* nonexistant memory */ #define QBM_LPE 0x40 /* local memory parity */ #define QBM_QPE 0x20 /* q-bus parity error */ #define QBM_DMAQPE 0x10 /* dma q-bus parity */ #define QBM_LEB 0x8 /* lost error bit */ #define QBM_WRW 0x2 /* write wrong parity */ #define QBM_PENB 0x1 /* parity enable */ #define QBM_EMASK 0xf8 /* mask to isolate cause*/ /* toy csr */ #define QBT_UIP 0x80 /* update in progress */ #define QBT_SETA 0x20 /* set up divider */ #define QBT_SETUP 0x80 /* stop */ #define QBT_SETB 0x6 /* binary and 24 hour */ /* * Symbolic BUS addresses for UBAs. */ #define VAXSTARNEXUS ((char *)(0x20080000)) #define UMEM630 ((u_short *)(0x30000000)) /* * Following allows VAXstar to use the QMEMmap * to access the second chunk of its I/O space. */ #define QMEMVAXSTAR ((char *)(0x200c0000)) #define QMEMSIZEVS 0xc0000 /* * Maps third chunk of VAXstar I/O space. */ #define NMEMVAXSTAR ((char *)(0x30000000)) #define NMEMSIZEVS 0x20000 /* * Maps fourth chunk of VAXstar I/O space, * for color display option */ #define SGMEMVAXSTAR ((char *)(0x3c000000)) #define SGMEMSIZEVS 0x18000 /* * Maps fifth chunk of VAXstar I/O space, * for MicroVAX 2000 serial line expander. */ #define SHMEMVAXSTAR ((char *)(0x38000000)) #define SHMEMSIZEVS 0x200