/*
 * mysub.c
 * Submodule template file
 * [eichin:19880511.2039EST]
 */

#include <msimdecl.h>
#define FUNCTION and_func
#define AND(C,A,B) make_binop(and_func, C, A, B)
#define DONE
/*
 * and.c
 * z = and(a, b...): if (a==HI) then and(b...) else LOW
 */ 
#define AND_DELAY 10

and_func(dep)
     Generics dep;
{
  STATE result = LOGIC_HI;
  Wire outwire;
  
  SAVEOUTWIRE(dep, outwire);
  
  while(MOREARGS(dep))
    {
      STATE nextinput;
      READNEXTSTATE(dep, nextinput);

      switch(nextinput)
	{
	case LOGIC_HI:
	  continue;		/* and skip the later break */
	  break;
	case LOGIC_LOW:
	  break;
	}
      result = LOGIC_LOW;
      break;			/* not enough HI's... */
    }
  
  SETOUTPUT(outwire, result, globaltime+AND_DELAY);
}