/*
 * mysub.c
 * Submodule template file
 * [eichin:19880511.2039EST]
 */

#include <msimdecl.h>
#define FUNCTION dff_func
#define DFF(Z, NZ, CLK, IN, PR, CL) make_anop(2, (Z, NZ), 5, (dff_func, CLK, IN, PR, CL))
#define DONE
/*
 * z, z' = dff(clk, in, preset, clear)
 */

/*
 * Table from page 5-22, TI databook, for 7474:
 * ========================================
 * inputs			outputs
 * ----------------------------------------
 * preset clear	clock	D	Q	Q'
 * ========================================
 * L	H	X	X	H	L
 * H	L	X	X	L	H
 * L	L	X	X	H*	H*
 * H	H	^	H	H	L
 * H	H	^	L	L	H
 * H	H	L	X	Q0	Q'0
 * ========================================
 * *unstable.
 * [eichin:19880406.1148EST]
 */
#define dff_tsetup 5
#define dff_tprop0 11
#define dff_tprop1 13

dff_func(dep)
     Generics dep;
{
  STATE result, nresult;
  Wire outz, noutz;
  STATE inclk, inin, inpreset, inclear;
  Time tinclk, tinin, tinpreset, tinclear;
  
  SAVEOUTWIRE(dep, outz);
  SAVEOUTWIRE(dep, noutz);
  READNEXTSTATETIME(dep, inclk, tinclk);
  READNEXTSTATETIME(dep, inin,  tinin);
  READNEXTSTATETIME(dep, inpreset, tinpreset);
  READNEXTSTATETIME(dep, inclear, tinclear);

  if(inpreset == LOGIC_LOW)	/* check preset */
    {
      SETOUTPUT(outz,  LOGIC_HI,  globaltime+dff_tprop0);
      SETOUTPUT(noutz, LOGIC_LOW, globaltime+dff_tprop0);
    }
  else if (inclear == LOGIC_LOW) /* check clear */
    {
      SETOUTPUT(outz,  LOGIC_LOW, globaltime+dff_tprop0);
      SETOUTPUT(noutz, LOGIC_HI,  globaltime+dff_tprop0);
    }
  else if((tinclk == globaltime)&&(inclk == LOGIC_HI))
				/* check clock rising edge */
    {
      if(tinin <= globaltime - dff_tsetup)
				/* check input stable time */
	{
	  SETOUTPUT(outz, inin, tinclk + dff_tprop1);
	}
    }
}