; TODO:
; Fix the timing

txint		mov     RTCC, #fullframe
                clrb    TXSWTCH
                mov	txbitcount,#8

:waitfors  	call	wait_for_bit    	;wait thru start bit and half of LSB

:getbit		movb  	c,SERIN 		;get serial bit
		rr    	txbyte          	;shift it into txbyte via carry
		call	wait_one_bit
		djnz	txbitcount,:getbit

                call    tmitbyt
                clrb    intf
                reti
dotxmit         mov     txbitcount, #8

tmitbyt        mov     bytect, #8
; This is a start bit.  It's a 1.
                call    txmitb1
                nop                 ; cycles b.7
                nop
                nop
                nop
                nop
                nop
                nop
                jmp     :foll1   ; cycles b.14, b.15
                nop                     ; cycle 6.7
                nop
                nop                     ; cycle 4.11, 6.9
:cont           sc                      ; cycle 1/0.12, 1/0.13, 2/3.10, 4.12, 4.13, 6.10
                jmp    :foll0        ; cycles 3/2.11, 3/2.12, 6.11
                jmp    :foll1        ; cycle 1/0.14, 1/0.15

:foll1          rr      txbyte          ; cycle 1/0.16
                snc                     ; cycle 1/0.17, 1.18
                call    tmitb11        ; cycle 0.18, 0.19
                sc                      ; cycle 0.7, 0.8, 1.19
                call    tmitb10        ; cycles 1.20, 1.21
                djnz    bytect, :cont   ; cycle 0.9, 0.10, 1/0.11
                ret
:foll0b         nop                     ; cycle 6.12
:foll0          rr      txbyte          ; cycle 3/2.13
                snc                    ; cycle 3/2.14, 2.15
;               call    tmitb01   but, 01 and 11 are the same entry point
                call    tmitb11        ; cycles 3.15, 3.16
                sc                      ; cycle 2.16
                call    tmitb00        ; cycle 2.17
                djnz    bytect, :cont   ; cycles 2/3.7, 2/3.8, 2/3.9
                ret
tmitb00        nop                     
tmitb10        nop
tmitb11        nop                     ; cycle 0.20
                nop
                nop
                nop    
                
txmitb1         mov     txcount,#tcycles	;sine integration
:oneloop	setb	PTX
		nop
		nop
		nop
		nop
		nop
		clrb	PTX
		nop
		nop
		nop
		nop
		nop
		setb	PTX
		nop
		nop
		nop
		nop
		nop
		clrb	PTX                  ; cycle 0.0 
		nop                          ; cycle 0.1
		nop                          ; cycle 0.2 
		djnz	txcount,:oneloop     ; cycles 0.3, 0.4
		ret                          ; cycles 0.5, 0.6
;----------------------------------------------------


wait_for_bit	mov	tdelay_cntr,#waitbitk
:loop3		djnz	tdelay_cntr,:loop3
		ret

wait_one_bit	mov	tdelay_cntr,#bitcell
:loop4		djnz	tdelay_cntr,:loop4
		ret
