6.775  CMOS Analog and Circuit Design

Final project report is due tomorrow (May 17th, Thursday). Hardcopy report can be submitted by 5pm tomorrow to TAs.  You can turn in your report after Thursday class or drop it on the box at 38-265. Email reports are accepted until midnight tomorrow(11:59pm Thursday), but a hardcopy identical to the email version must be submitted to TAs by Friday noon.(drop it on the box at 38-265)

'Spice design files (or Cadence netlist files)' and 'simulation result files' are not required. So, please do not send it to TAs email.

The final project is a team project, nominally a team of 2. You will need to select the partner by Monday, April 23, and email Sunghyuk Lee with the names of the team members. If you have not selected the partner by the end of the day on April 23, we'll make the team assignments.

Midterm project report is due Tomorrow(April 3, Tuesday)

1. Reports : Turn in hardcopy or submit to TAs via email
1) Hardcopy report can be submitted by 5pm tomorrow to TAs.  You can turn in homework after the Tuesday class or drop it on the box at 38-265.
2) Email reports are accepted until midnight tomorrow(11:59pm Tues), but a hardcopy identical to the email version must be submitted to TAs by Wednesday noon.(drop it on the box at 38-265)

2. Spice or Cadence files : submit to TAs via email
1) spice user : send all your xxx.sp files (Do not send output files)
2) cadence user : send netlist files("ADE->Simulation->Netlist->Creat->Save As") and simulation script files("ADE->Session->Save Script")

Past Midterm Quizzes and Solutions (2007~2010) are online.

Midterm Quiz will be held on April 12 (Thursday) 7:30-9:00 PM in 32-124.

PSET5 solution is available now, and PSET4 solution will be posted soon.

1. Simulation tolerance : In your transient simulation for settling test, if your output wave is too choppy and has too few data, please change the tolerance and simulation time setting as follow.

1) text-based hspice :

(1) simulation tolerance parameters

ACCURATE=1 (<=most effective, default =0)

If this is not enough, reduce the following parameters,

RELV = 1e-4 (<= default = 1e-3)
RELV = 1e-4 (<= default = 1e-3)
RELQ = 1e-3 (<= default = 1e-2)
RELI = 1e-3 (<= default = 1e-2)
RELH = 5e-3  (<= default = 5e-2)
GMIN = 1e-13 (<= default = 1e-12)
CHGTOL = 1e-16 (<= default = 1e-15)

Information and syntax of these parameters can be found on the hspice manual on the stellar website.

(2) simulation time resolution

DELMAX = (max. time step you want)

Information and syntax of these parameters can be found on the hspice manual on the stellar website.

2) Cadence 'Analog Design Environment(ADE)' : 

All the parameters explained before can be found on the menu "Simulation-> Analog Options -> Transient and AC Options -> Accuracy Options". The "Max Step" field in the transient analysis setting is the same as DELMAX.


2. Noise spec

1) If your circuit is stable with unity-gain feedback and meet the old requirement (180uV rms) with unity gain feedback, it is okay to report this result in your report.

2) When you simulate with beta = 1/4 cap feedback, you have to specify the initial condition on the negative terminal and output of your op-amp to make sure the right operation. When you do noise simulation, please check that AC gain at the output is what you expected, as well(1/beta =~ 4 =~ 12dB). Because AC sim is required for noise sim, there is no extra simulation is needed for this.

3. Common errors

1) As explained in noise simulation, we have to specify the initial condition when we have cap feedback. The syntax can be found on the hspice manual. (Search for "initial condition"). For cadence ADE, go to "Simulation Aids->Convergence Aids->Initial Condition"

2) In Cadence, you have to specify the model name for each transistor you instanciated. After you instanciate a transistor, select the transistor and press "q" and put either "pmos" or "nmos" on the "Model name" field.

3) In Cadence, you also have to add "AD, AS, PD, and PS" in each tansistor on the property window(select a transistor and press q), just like text-based netlist. They are not calculated automatically in this class setup. The filed for these values are "Drain diffusion area, Source diffusion area, Drain diffusion periphery, and Source diffusion periphery".