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\title{UROP Proposal - IAP/Spring 1989}
\author{Andr\'e DeHon}
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 Professor Knight and Henry Minsky are developing a
low-latency, processor to processor interconnection switch
to provide high performance inter-processor communications for parallel
computers. 
Starting IAP 1989, I will join their efforts.  

\par

As a central building block to the proposed switching network, a custom
CMOS VLSI routing chip will need to be designed and fabricated.  Knight and
Minsky have already defined the functional behaviour of the routing chip
and are ready to begin detailed specifications.  Initially, I will work on
the logical construction of this chip.  I will be acquiring a better
understanding of VLSI design at all levels.  With this, I intend to be
involved with the specificatoin and verification of the routing chip at all
levels ({\it e.g.\ } logic, circuit, layout).

\par

In addition, to work on the routing chip, I will become familiar with the
issues present in the design of the entire interconnection switch and hope
to be integrated into the whole design and testing project.

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