PATENTS   
Patents > Tools and Guidance >> Classification >>> Class Schedule
    Class Numbers & Titles   | Class Numbers Only   | USPC Index   | International   | HELP  
You are viewing a USPC Schedule.
[Search a list of Patent Appplications for class 714]  Class   714ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY
Click here for a printable version of this file
[List of Patents for class 714 subclass 100]  100           DATA PROCESSING SYSTEM ERROR OR FAULT HANDLING
[List of Patents for class 714 subclass 1]  1           Subclass 1 indent level is 1 Reliability and availability
[List of Patents for class 714 subclass 2]  2           Subclass 2 indent level is 2 Fault recovery
[List of Patents for class 714 subclass 3]  3           Subclass 3 indent level is 3 By masking or reconfiguration
[List of Patents for class 714 subclass 4]  4           Subclass 4 indent level is 4 Of network
[List of Patents for class 714 subclass 5]  5           Subclass 5 indent level is 4 Of memory or peripheral subsystem
[List of Patents for class 714 subclass 6]  6           Subclass 6 indent level is 5 Redundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data)
[List of Patents for class 714 subclass 7]  7           Subclass 7 indent level is 6 Reconfiguration (e.g., adding a replacement storage component)
[List of Patents for class 714 subclass 8]  8           Subclass 8 indent level is 5 Isolating failed storage location (e.g., sector remapping)
[List of Patents for class 714 subclass 9]  9           Subclass 9 indent level is 5 Access processor affected (e.g., I/O processor, MMU, DMA processor)
[List of Patents for class 714 subclass 10]  10           Subclass 10 indent level is 4 Of processor
[List of Patents for class 714 subclass 11]  11           Subclass 11 indent level is 5 Concurrent, redundantly operating processors
[List of Patents for class 714 subclass 12]  12           Subclass 12 indent level is 6 Synchronization maintenance of processors
[List of Patents for class 714 subclass 13]  13           Subclass 13 indent level is 5 Prepared backup processor (e.g., initializing cold backup) or updating backup processor (e.g., by checkpoint message)
[List of Patents for class 714 subclass 14]  14           Subclass 14 indent level is 4 Of power supply
[List of Patents for class 714 subclass 15]  15           Subclass 15 indent level is 3 State recovery (i.e., process or data file)
[List of Patents for class 714 subclass 16]  16           Subclass 16 indent level is 4 Forward recovery (e.g., redoing committed action)
[List of Patents for class 714 subclass 17]  17           Subclass 17 indent level is 5 Reexecuting single instruction or bus cycle
[List of Patents for class 714 subclass 18]  18           Subclass 18 indent level is 4 Transmission data record (e.g., for retransmission)
[List of Patents for class 714 subclass 19]  19           Subclass 19 indent level is 4 Undo record
[List of Patents for class 714 subclass 20]  20           Subclass 20 indent level is 4 Plural recovery data sets containing set interrelation data (e.g., time values or log record numbers)
[List of Patents for class 714 subclass 21]  21           Subclass 21 indent level is 4 State validity check
[List of Patents for class 714 subclass 22]  22           Subclass 22 indent level is 4 With power supply status monitoring
[List of Patents for class 714 subclass 23]  23           Subclass 23 indent level is 3 Resetting processor
[List of Patents for class 714 subclass 24]  24           Subclass 24 indent level is 3 Safe shutdown
[List of Patents for class 714 subclass 25]  25           Subclass 25 indent level is 2 Fault locating (i.e., diagnosis or testing)
[List of Patents for class 714 subclass 26]  26           Subclass 26 indent level is 3 Artificial intelligence (e.g., diagnostic expert system)
[List of Patents for class 714 subclass 27]  27           Subclass 27 indent level is 3 Particular access structure
[List of Patents for class 714 subclass 28]  28           Subclass 28 indent level is 4 Substituted emulative component (e.g., emulator microprocessor)
[List of Patents for class 714 subclass 29]  29           Subclass 29 indent level is 5 Memory emulator feature
[List of Patents for class 714 subclass 30]  30           Subclass 30 indent level is 4 Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path)
[List of Patents for class 714 subclass 31]  31           Subclass 31 indent level is 4 Additional processor for in-system fault locating (e.g., distributed diagnosis program)
[List of Patents for class 714 subclass 32]  32           Subclass 32 indent level is 3 Particular stimulus creation
[List of Patents for class 714 subclass 33]  33           Subclass 33 indent level is 4 Derived from analysis (e.g., of a specification or by stimulation)
[List of Patents for class 714 subclass 34]  34           Subclass 34 indent level is 4 Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping)
[List of Patents for class 714 subclass 35]  35           Subclass 35 indent level is 4 Substituted or added instruction (e.g., code instrumenting, breakpoint instruction)
[List of Patents for class 714 subclass 36]  36           Subclass 36 indent level is 4 Test sequence at power-up or initialization
[List of Patents for class 714 subclass 37]  37           Subclass 37 indent level is 3 Analysis (e.g., of output, state, or design)
[List of Patents for class 714 subclass 38]  38           Subclass 38 indent level is 4 Of computer software
[List of Patents for class 714 subclass 39]  39           Subclass 39 indent level is 4 Monitor recognizes sequence of events (e.g., protocol or logic state analyzer)
[List of Patents for class 714 subclass 40]  40           Subclass 40 indent level is 3 Component dependent technique
[List of Patents for class 714 subclass 41]  41           Subclass 41 indent level is 4 For reliability enhancing component (e.g., testing backup spare, or fault injection)
[List of Patents for class 714 subclass 42]  42           Subclass 42 indent level is 4 Memory or storage device component fault
[List of Patents for class 714 subclass 43]  43           Subclass 43 indent level is 4 Bus, I/O channel, or network path component fault
[List of Patents for class 714 subclass 44]  44           Subclass 44 indent level is 4 Peripheral device component fault
[List of Patents for class 714 subclass 45]  45           Subclass 45 indent level is 3 Output recording (e.g., signature or trace)
[List of Patents for class 714 subclass 46]  46           Subclass 46 indent level is 3 Operator interface for diagnosing or testing
[List of Patents for class 714 subclass 47]  47           Subclass 47 indent level is 2 Performance monitoring for fault avoidance
[List of Patents for class 714 subclass 48]  48           Subclass 48 indent level is 2 Error detection or notification
[List of Patents for class 714 subclass 49]  49           Subclass 49 indent level is 3 State error (i.e., content of instruction, data, or message)
[List of Patents for class 714 subclass 50]  50           Subclass 50 indent level is 4 State out of sequence
[List of Patents for class 714 subclass 51]  51           Subclass 51 indent level is 5 Control flow state sequence monitored (e.g., watchdog processor for control-flow checking)
[List of Patents for class 714 subclass 52]  52           Subclass 52 indent level is 5 Error checking code
[List of Patents for class 714 subclass 53]  53           Subclass 53 indent level is 4 Address error
[List of Patents for class 714 subclass 54]  54           Subclass 54 indent level is 4 Storage content error
[List of Patents for class 714 subclass 55]  55           Subclass 55 indent level is 3 Timing error (e.g., watchdog timer time-out)
[List of Patents for class 714 subclass 56]  56           Subclass 56 indent level is 4 Bus or I/O channel device fault
[List of Patents for class 714 subclass 57]  57           Subclass 57 indent level is 3 Error forwarding and presentation (e.g., operator console, error display)
[List of Patents for class 714 subclass 699]  699           PULSE OR DATA ERROR HANDLING
[List of Patents for class 714 subclass 700]  700           Subclass 700 indent level is 1 Skew detection correction
[List of Patents for class 714 subclass 701]  701           Subclass 701 indent level is 1 Data formatting to improve error detection correction capability
[List of Patents for class 714 subclass 702]  702           Subclass 702 indent level is 2 Memory access (e.g., address permutation)
[List of Patents for class 714 subclass 703]  703           Subclass 703 indent level is 1 Testing of error-check system
[List of Patents for class 714 subclass 704]  704           Subclass 704 indent level is 1 Error count or rate
[List of Patents for class 714 subclass 705]  705           Subclass 705 indent level is 2 Pseudo-error rate
[List of Patents for class 714 subclass 706]  706           Subclass 706 indent level is 2 Up-down counter
[List of Patents for class 714 subclass 707]  707           Subclass 707 indent level is 2 Synchronization control
[List of Patents for class 714 subclass 708]  708           Subclass 708 indent level is 2 Shutdown or establishing system parameter (e.g., transmission rate)
[List of Patents for class 714 subclass 709]  709           Subclass 709 indent level is 1 Data pulse evaluation/bit decision
[List of Patents for class 714 subclass 710]  710           Subclass 710 indent level is 1 Replacement of memory spare location, portion, or segment
[List of Patents for class 714 subclass 711]  711           Subclass 711 indent level is 2 Spare row or column
[List of Patents for class 714 subclass 712]  712           Subclass 712 indent level is 1 Transmission facility testing
[List of Patents for class 714 subclass 713]  713           Subclass 713 indent level is 2 For channel having repeater
[List of Patents for class 714 subclass 714]  714           Subclass 714 indent level is 2 By tone signal
[List of Patents for class 714 subclass 715]  715           Subclass 715 indent level is 2 Test pattern with comparison
[List of Patents for class 714 subclass 716]  716           Subclass 716 indent level is 3 Loop-back
[List of Patents for class 714 subclass 717]  717           Subclass 717 indent level is 2 Loop or ring configuration
[List of Patents for class 714 subclass 718]  718           Subclass 718 indent level is 1 Memory testing
[List of Patents for class 714 subclass 719]  719           Subclass 719 indent level is 2 Read-in with read-out and compare
[List of Patents for class 714 subclass 720]  720           Subclass 720 indent level is 3 Special test pattern (e.g., checkerboard, walking ones)
[List of Patents for class 714 subclass 721]  721           Subclass 721 indent level is 2 Electrical parameter (e.g., threshold voltage)
[List of Patents for class 714 subclass 722]  722           Subclass 722 indent level is 2 Performing arithmetic function on memory contents
[List of Patents for class 714 subclass 723]  723           Subclass 723 indent level is 2 Error mapping or logging
[List of Patents for class 714 subclass 724]  724           Subclass 724 indent level is 1 Digital logic testing
[List of Patents for class 714 subclass 725]  725           Subclass 725 indent level is 2 Programmable logic array (PLA) testing
[List of Patents for class 714 subclass 726]  726           Subclass 726 indent level is 2 Scan path testing (e.g., level sensitive scan design (LSSD))
[List of Patents for class 714 subclass 727]  727           Subclass 727 indent level is 3 Boundary scan
[List of Patents for class 714 subclass 728]  728           Subclass 728 indent level is 3 Random pattern generation (includes pseudorandom pattern)
[List of Patents for class 714 subclass 729]  729           Subclass 729 indent level is 3 Plural scan paths
[List of Patents for class 714 subclass 730]  730           Subclass 730 indent level is 3 Addressing
[List of Patents for class 714 subclass 731]  731           Subclass 731 indent level is 3 Clock or synchronization
[List of Patents for class 714 subclass 732]  732           Subclass 732 indent level is 2 Signature analysis
[List of Patents for class 714 subclass 733]  733           Subclass 733 indent level is 2 Built-in testing circuit (BILBO)
[List of Patents for class 714 subclass 734]  734           Subclass 734 indent level is 2 Structural (in-circuit test)
[List of Patents for class 714 subclass 735]  735           Subclass 735 indent level is 2 Device response compared to input pattern
[List of Patents for class 714 subclass 736]  736           Subclass 736 indent level is 2 Device response compared to expected fault-free response
[List of Patents for class 714 subclass 737]  737           Subclass 737 indent level is 2 Device response compared to fault dictionary/truth table
[List of Patents for class 714 subclass 738]  738           Subclass 738 indent level is 2 Including test pattern generator
[List of Patents for class 714 subclass 739]  739           Subclass 739 indent level is 3 Random pattern generation (includes pseudorandom pattern)
[List of Patents for class 714 subclass 740]  740           Subclass 740 indent level is 3 Having analog signal
[List of Patents for class 714 subclass 741]  741           Subclass 741 indent level is 3 Simulation
[List of Patents for class 714 subclass 742]  742           Subclass 742 indent level is 3 Testing specific device
[List of Patents for class 714 subclass 743]  743           Subclass 743 indent level is 3 Addressing
[List of Patents for class 714 subclass 744]  744           Subclass 744 indent level is 3 Clock or synchronization
[List of Patents for class 714 subclass 745]  745           Subclass 745 indent level is 2 Determination of marginal operation limits
[List of Patents for class 714 subclass 746]  746           Subclass 746 indent level is 1 Digital data error correction
[List of Patents for class 714 subclass 747]  747           Subclass 747 indent level is 2 Substitution of previous valid data
[List of Patents for class 714 subclass 748]  748           Subclass 748 indent level is 2 Request for retransmission
[List of Patents for class 714 subclass 749]  749           Subclass 749 indent level is 3 Retransmission if no ACK returned
[List of Patents for class 714 subclass 750]  750           Subclass 750 indent level is 3 Feedback to transmitter for comparison
[List of Patents for class 714 subclass 751]  751           Subclass 751 indent level is 3 Including forward error correction capability
[List of Patents for class 714 subclass 752]  752           Subclass 752 indent level is 2 Forward correction by block code
[List of Patents for class 714 subclass 753]  753           Subclass 753 indent level is 3 Double error correcting with single error correcting code
[List of Patents for class 714 subclass 754]  754           Subclass 754 indent level is 3 Error correction during refresh cycle
[List of Patents for class 714 subclass 755]  755           Subclass 755 indent level is 3 Double encoding codes (e.g., product, concatenated)
[List of Patents for class 714 subclass 756]  756           Subclass 756 indent level is 4 Cross-interleave Reed-Solomon code (CIRC)
[List of Patents for class 714 subclass 757]  757           Subclass 757 indent level is 3 Parallel generation of check bits
[List of Patents for class 714 subclass 758]  758           Subclass 758 indent level is 3 Error correcting code with additional error detection code (e.g., cyclic redundancy character, parity)
[List of Patents for class 714 subclass 759]  759           Subclass 759 indent level is 3 Look-up table encoding or decoding
[List of Patents for class 714 subclass 760]  760           Subclass 760 indent level is 3 Threshold decoding (e.g., majority logic)
[List of Patents for class 714 subclass 761]  761           Subclass 761 indent level is 3 Random and burst error correction
[List of Patents for class 714 subclass 762]  762           Subclass 762 indent level is 3 Burst error correction
[List of Patents for class 714 subclass 763]  763           Subclass 763 indent level is 3 Memory access
[List of Patents for class 714 subclass 764]  764           Subclass 764 indent level is 4 Error correct and restore
[List of Patents for class 714 subclass 765]  765           Subclass 765 indent level is 4 Error pointer
[List of Patents for class 714 subclass 766]  766           Subclass 766 indent level is 4 Check bits stored in separate area of memory
[List of Patents for class 714 subclass 767]  767           Subclass 767 indent level is 4 Code word for plural n-bit (n>1) storage units (e.g., x4 DRAM's)
[List of Patents for class 714 subclass 768]  768           Subclass 768 indent level is 4 Error correction code for memory address
[List of Patents for class 714 subclass 769]  769           Subclass 769 indent level is 4 Dynamic data storage
[List of Patents for class 714 subclass 770]  770           Subclass 770 indent level is 5 Disk array
[List of Patents for class 714 subclass 771]  771           Subclass 771 indent level is 5 Tape
[List of Patents for class 714 subclass 772]  772           Subclass 772 indent level is 4 Code word parallel access
[List of Patents for class 714 subclass 773]  773           Subclass 773 indent level is 4 Solid state memory
[List of Patents for class 714 subclass 774]  774           Subclass 774 indent level is 3 Adaptive error-correcting capability
[List of Patents for class 714 subclass 775]  775           Subclass 775 indent level is 3 Synchronization
[List of Patents for class 714 subclass 776]  776           Subclass 776 indent level is 3 For packet or frame multiplexed data
[List of Patents for class 714 subclass 777]  777           Subclass 777 indent level is 3 Hamming code
[List of Patents for class 714 subclass 778]  778           Subclass 778 indent level is 3 Nonbinary data (e.g., ternary)
[List of Patents for class 714 subclass 779]  779           Subclass 779 indent level is 3 Variable length data
[List of Patents for class 714 subclass 780]  780           Subclass 780 indent level is 3 Using symbol reliability information (e.g., soft decision)
[List of Patents for class 714 subclass 781]  781           Subclass 781 indent level is 3 Code based on generator polynomial
[List of Patents for class 714 subclass 782]  782           Subclass 782 indent level is 4 Bose-Chaudhuri-Hocquenghem code
[List of Patents for class 714 subclass 783]  783           Subclass 783 indent level is 4 Golay code
[List of Patents for class 714 subclass 784]  784           Subclass 784 indent level is 4 Reed-Solomon code
[List of Patents for class 714 subclass 785]  785           Subclass 785 indent level is 4 Syndrome computed
[List of Patents for class 714 subclass 786]  786           Subclass 786 indent level is 2 Forward error correction by tree code (e.g., convolutional)
[List of Patents for class 714 subclass 787]  787           Subclass 787 indent level is 3 Random and burst errors
[List of Patents for class 714 subclass 788]  788           Subclass 788 indent level is 3 Burst error
[List of Patents for class 714 subclass 789]  789           Subclass 789 indent level is 3 Synchronization
[List of Patents for class 714 subclass 790]  790           Subclass 790 indent level is 3 Puncturing
[List of Patents for class 714 subclass 791]  791           Subclass 791 indent level is 3 Sequential decoder (e.g., Fano or stack algorithm)
[List of Patents for class 714 subclass 792]  792           Subclass 792 indent level is 3 Trellis code
[List of Patents for class 714 subclass 793]  793           Subclass 793 indent level is 3 Syndrome decodable (e.g., self orthogonal)
[List of Patents for class 714 subclass 794]  794           Subclass 794 indent level is 3 Maximum likelihood
[List of Patents for class 714 subclass 795]  795           Subclass 795 indent level is 3 Viterbi decoding
[List of Patents for class 714 subclass 796]  796           Subclass 796 indent level is 3 Branch metric calculation
[List of Patents for class 714 subclass 797]  797           Subclass 797 indent level is 2 Majority decision/voter circuit
[List of Patents for class 714 subclass 798]  798           Subclass 798 indent level is 1 Error detection for synchronization control
[List of Patents for class 714 subclass 799]  799           Subclass 799 indent level is 1 Error/fault detection technique
[List of Patents for class 714 subclass 800]  800           Subclass 800 indent level is 2 Parity bit
[List of Patents for class 714 subclass 801]  801           Subclass 801 indent level is 3 Parity generator or checker circuit detail
[List of Patents for class 714 subclass 802]  802           Subclass 802 indent level is 3 Even and odd parity
[List of Patents for class 714 subclass 803]  803           Subclass 803 indent level is 3 Parity prediction
[List of Patents for class 714 subclass 804]  804           Subclass 804 indent level is 3 Plural dimension parity check
[List of Patents for class 714 subclass 805]  805           Subclass 805 indent level is 3 Storage accessing (e.g., address parity check)
[List of Patents for class 714 subclass 806]  806           Subclass 806 indent level is 2 Constant-ratio code (m/n)
[List of Patents for class 714 subclass 807]  807           Subclass 807 indent level is 2 Check character
[List of Patents for class 714 subclass 808]  808           Subclass 808 indent level is 3 Modulo-n residue check character
[List of Patents for class 714 subclass 809]  809           Subclass 809 indent level is 2 Code constraint monitored
[List of Patents for class 714 subclass 810]  810           Subclass 810 indent level is 3 Multilevel coding (n>2)
[List of Patents for class 714 subclass 811]  811           Subclass 811 indent level is 2 Forbidden combination or improper condition
[List of Patents for class 714 subclass 812]  812           Subclass 812 indent level is 3 Specified digital signal or pulse count
[List of Patents for class 714 subclass 813]  813           Subclass 813 indent level is 3 Two key-down detector
[List of Patents for class 714 subclass 814]  814           Subclass 814 indent level is 3 Data timing/clocking
[List of Patents for class 714 subclass 815]  815           Subclass 815 indent level is 3 Time delay/interval monitored
[List of Patents for class 714 subclass 816]  816           Subclass 816 indent level is 3 Two-rail logic
[List of Patents for class 714 subclass 817]  817           Subclass 817 indent level is 3 Noise level
[List of Patents for class 714 subclass 818]  818           Subclass 818 indent level is 3 Missing-bit/drop-out detection
[List of Patents for class 714 subclass 819]  819           Subclass 819 indent level is 2 Comparison of data
[List of Patents for class 714 subclass 820]  820           Subclass 820 indent level is 3 Plural parallel devices of channels
[List of Patents for class 714 subclass 821]  821           Subclass 821 indent level is 4 Transmission facility
[List of Patents for class 714 subclass 822]  822           Subclass 822 indent level is 3 Sequential repetition
[List of Patents for class 714 subclass 823]  823           Subclass 823 indent level is 4 True and complement data
[List of Patents for class 714 subclass 824]  824           Subclass 824 indent level is 3 Device output compared to input
 
FOREIGN ART COLLECTIONS
 
   FOR000          CLASS-RELATED FOREIGN DOCUMENTS
Any foreign patents or non-patent literature from subclasses that have been reclassified have been transferred directly to FOR Collections listed below. These Collections contain ONLY foreign patents or non-patent literature. The parenthetical references in the Collection titles refer to the abolished subclasses from which these Collections were derived.
              MEMORY TESTING (371/21.1)
              DIGITAL LOGIC TESTING (371/22.1)
              DIGITAL DATA ERROR CORRECTION (371/30)
   FOR100          Subclass FOR100 indent level is 1 Scan path testing (LSSD) (371/22.3)
   FOR101          Subclass FOR101 indent level is 1 Including test pattern generator (371/27)
   FOR102          Subclass FOR102 indent level is 1 Block code (371/37.1)
   FOR103          Subclass FOR103 indent level is 2 Memory access (371/40.1)
   FOR104          Subclass FOR104 indent level is 1 Convolutional code (371/43)
   FOR288          ERROR/FAULT ANTICIPATION (371/4)
              Subclass indent level is 1 Replacement with spare device or system (371/8.1)
   FOR289          Subclass FOR289 indent level is 2 Transmission facility or channel (371.8.2)
   FOR290          Subclass FOR290 indent level is 2 Memory (371/10.1)
   FOR291          Subclass FOR291 indent level is 2 Transmission facility (371/11.2)
   FOR292          Subclass FOR292 indent level is 2 Data processor or computer (371/11.3)
              DIAGNOSTIC TESTING (371/15.1)
   FOR293          Subclass FOR293 indent level is 1 Programmable processor testing (371/16.1)
   FOR294          Subclass FOR294 indent level is 2 Emulator device (371/16.2)
   FOR295          Subclass FOR295 indent level is 2 Watchdog timer (e.g., time-out) (371/16.3)
   FOR296          Subclass FOR296 indent level is 2 Processor within diverse (microwave, photocopier) (371/16.4)
   FOR297          Subclass FOR297 indent level is 2 Error or fault, logging or tracking (371/16.5)
   FOR298          Subclass FOR298 indent level is 2 Dedicated maintenance subsystem (371/18)
   FOR299          Subclass FOR299 indent level is 1 Testing of external device by programmable digital computer (371/20)
   FOR300          ERROR DETECTION FOR SYNCHRONIZATION CONTROL (371/47.1)

This file produced by USPTO - SIRA - Office of Patent Automation - Reference Tools Project

Contact: United States Patent and Trademark Office - Classification Operations Crystal Park 3, Suite 902 Washington, DC 20231 phone: (703) 305-5107

For questions and comments please e-mail.


Note: The Patent and Trademark Depository Library Program (PTDLP) administers a nationwide network of public, state and academic libraries designated as Patent and Trademark Depository Libraries authorized by 35 U.S.C. 13 to: Disseminate Patent and Trademark Information Support Diverse Intellectual Property Needs of the Public

Contact: United States Patent and Trademark Office - PTDLP Crystal Park 3, Suite 481 Washington, DC 20231 Fax: (703) 306-2662


Note: For information/comments on electronic information products, such as purchasing USPTO data, or to discuss system requirements for magnetic tape products, contact:

     Information Products Division -- U.S. Patent and Trademark Office Information Products Division
     PK3- Suite 441 Washington, DC 20231
     tel: (703) 306-2600 FAX: (703) 306-2737 email: oeip@uspto.gov

Or, browse their on-line catalog.

The Inventors Assistance Center is available to help you on patent matters.Send questions about USPTO programs and services to the USPTO Contact Center (UCC). You can suggest USPTO webpages or material you would like featured on this section by E-mail to the webmaster@uspto.gov. While we cannot promise to accommodate all requests, your suggestions will be considered and may lead to other improvements on the website.

|.HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT