# 1 "head.S" .text .global idt .global idt_descr .global trap_regs # 1 "/usr/include/linux/linkage.h" 1 3 # 27 "/usr/include/linux/linkage.h" 3 # 45 "/usr/include/linux/linkage.h" 3 # 57 "/usr/include/linux/linkage.h" 3 # 18 "head.S" 2 # 1 "mtest.h" 1 # 19 "head.S" 2 startup_32: cld cli movl $(0x18),%eax mov %ax,%ds mov %ax,%es mov %ax,%fs mov %ax,%gs mov %ax,%ss mov $(0x1000),%esp xorl %eax,%eax a20: incl %eax # check that A20 really IS enabled movl %eax,0x000000 # loop forever if it isn't cmpl %eax,0x100000 je a20 lgdt gdt_descr ljmp $(0x10),$flush flush: movl $(0x18),%eax # reload all the segment registers mov %ax,%ds # after changing gdt. mov %ax,%es mov %ax,%fs mov %ax,%gs mov %ax,%ss lea idt,%edi lea vec0,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec1,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec2,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec3,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec4,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec5,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec6,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec7,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec8,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec9,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec10,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec11,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec12,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec13,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec14,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec15,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec16,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec17,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi lea vec18,%edx movl $(0x10 << 16),%eax movw %dx,%ax movw $0x8E00,%dx movl %eax,(%edi) movl %edx,4(%edi) addl $8,%edi call do_test vec0: movl $0,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec1: movl $1,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec2: movl $2,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec3: movl $3,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec4: movl $4,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec5: movl $5,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec6: movl $6,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec7: movl $7,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec8: movl $8,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec9: movl $9,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec10: movl $10,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec11: movl $11,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec12: movl $12,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec13: movl $13,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec14: movl $14,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec15: movl $15,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec16: movl $16,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec17: movl $17,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand vec18: movl $18,%eax lea trap_regs,%edi movl %eax,(%edi) jp int_hand int_hand: popl %eax movl %eax,16(%edi) popl %eax movl %eax,12(%edi) popl %eax movl %eax,8(%edi) popl %eax movl %eax,4(%edi) call inter trap_regs: .long 0 # Vector .long 0 # Eflag .long 0 # CS .long 0 # EIP .long 0 # Error Code .align 4 .word 0 idt_descr: .word 20*8-1 # idt contains 32 entries .long idt idt: .fill 20,8,0 # idt is uninitialized gdt_descr: .word (16)*8-1 .long _gdt .align 4 _gdt: .quad 0x0000000000000000 .quad 0x0000000000000000 .quad 0x00cf9a000000ffff .quad 0x00cf92000000ffff .quad 0x00cf9a100000ffff .quad 0x00cf92100000ffff